f7c34874f0
Implement atomic primitives using exclusive access opcodes available in the recent xtensa cores. Since l32ex/s32ex don't have any memory ordering guarantees don't define __smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
18 lines
314 B
C
18 lines
314 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2019 Cadence Design Systems Inc. */
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#ifndef _ASM_XTENSA_CORE_H
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#define _ASM_XTENSA_CORE_H
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#include <variant/core.h>
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#ifndef XCHAL_HAVE_EXCLUSIVE
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#define XCHAL_HAVE_EXCLUSIVE 0
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#endif
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#ifndef XCHAL_SPANNING_WAY
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#define XCHAL_SPANNING_WAY 0
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#endif
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#endif
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