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f756066990
linux/drivers/usb/renesas_usbhs
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Chris Brandt f756066990 usb: renesas_usbhs: support byte addressable CFIFO 
Some SoC have a CFIFO register that is byte addressable. This means
when the CFIFO access is set to 32-bit, you can write 8-bit values to
addresses CFIFO+0, CFIFO+1, CFIFO+2, CFIFO+3.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:25:59 +02:00
..
common.c usb: renesas_usbhs: add support for CNEN bit 2019-05-21 10:25:59 +02:00
common.h usb: renesas_usbhs: add support for CNEN bit 2019-05-21 10:25:59 +02:00
fifo.c usb: renesas_usbhs: support byte addressable CFIFO 2019-05-21 10:25:59 +02:00
fifo.h USB: renesas_usbhs: Remove redundant license text 2017-11-07 15:45:01 +01:00
Kconfig usb: remove redundant 'default n' from Kconfig-s 2019-05-21 10:06:22 +02:00
Makefile usb: renesas_usbhs: Add support for RZ/A1 2018-01-09 16:18:50 +01:00
mod_gadget.c USB: mark expected switch fall-throughs 2018-07-02 18:08:19 +02:00
mod_host.c USB: renesas_usbhs: fix spelling mistake "doens't" -> "doesn't" 2019-02-19 14:41:38 +01:00
mod.c USB: renesas_usbhs: Remove redundant license text 2017-11-07 15:45:01 +01:00
mod.h USB: renesas_usbhs: Remove redundant license text 2017-11-07 15:45:01 +01:00
pipe.c treewide: kzalloc() -> kcalloc() 2018-06-12 16:19:22 -07:00
pipe.h usb: renesas_usbhs: add usbhs_pipe_clear_without_sequence() function 2017-12-12 13:04:09 +02:00
rcar2.c USB: renesas_usbhs: drop unused legacy-phy support 2018-04-22 15:58:24 +02:00
rcar2.h USB: renesas_usbhs: rcar?.h: add SPDX tags 2017-11-07 15:53:48 +01:00
rcar3.c usb: renesas_usbhs: replace udelay() with usleep_range() 2019-01-18 10:00:49 +01:00
rcar3.h USB: renesas_usbhs: rcar?.h: add SPDX tags 2017-11-07 15:53:48 +01:00
rza.c usb: renesas_usbhs: replace udelay() with usleep_range() 2019-01-18 10:00:49 +01:00
rza.h usb: renesas_usbhs: Add support for RZ/A1 2018-01-09 16:18:50 +01:00