linux/drivers/gpu
Jesse Barnes f60711666b i915/vlv: untangle integrated clock source handling v4
The global integrated clock source bit resides in DPLL B on VLV, but we
were treating it as a per-pipe resource.  It needs to be set whenever
any PLL is active, so pull setting the bit out of vlv_update_pll and
into vlv_enable_pll.  Also add a vlv_disable_pll to prevent disabling it
when pipe B shuts down.

I'm guessing on the references here, I expect this to bite any config
where multiple displays are active or displays are moved from pipe to
pipe.

v2: re-add bits in vlv_update_pll to keep from confusing the state checker
v3: use enum pipe checks (Daniel)
    set CRI clock source early (Ville)
    consistently set CRI clock source everywhere (Ville)
v4: drop unnecessary setting of bit in vlv enable pll (Ville)

References: https://bugs.freedesktop.org/show_bug.cgi?id=67245
References: https://bugs.freedesktop.org/show_bug.cgi?id=69693
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: s/1/PIPE_B/]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-03 20:01:06 +02:00
..
drm i915/vlv: untangle integrated clock source handling v4 2013-10-03 20:01:06 +02:00
host1x Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux 2013-09-05 10:17:26 -07:00
vga vgaarb: Fix VGA decodes changes 2013-09-03 19:17:59 +02:00
Makefile gpu: host1x: Add host1x driver 2013-04-22 12:32:40 +02:00