forked from Minki/linux
c007b3a697
Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.
Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
608 lines
14 KiB
Plaintext
608 lines
14 KiB
Plaintext
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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chosen {
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stdout-path = &uart2;
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_2p5v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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reg_can_xcvr: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "CAN XCVR";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can_xcvr>;
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gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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wakeup-source;
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};
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menu {
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label = "Menu";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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};
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home {
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label = "Home";
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gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOME>;
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};
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back {
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label = "Back";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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sound {
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compatible = "fsl,imx6q-sabrelite-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6q-sabrelite-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <4>;
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};
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backlight_lcd: backlight_lcd {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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backlight_lvds: backlight_lvds {
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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lcd_display: display@di0 {
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compatible = "fsl,imx-parallel-display";
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#address-cells = <1>;
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#size-cells = <0>;
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interface-pix-fmt = "bgr666";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_j15>;
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status = "okay";
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port@0 {
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reg = <0>;
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lcd_display_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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lcd_display_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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lcd_panel {
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compatible = "okaya,rs800480t-7x0gp";
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backlight = <&backlight_lcd>;
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcd_display_out>;
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};
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};
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};
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panel {
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compatible = "hannstar,hsd100pxn1";
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backlight = <&backlight_lvds>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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xceiver-supply = <®_can_xcvr>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&ecspi1 {
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio3 19 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash: m25p80@0 {
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compatible = "sst,sst25vf016b", "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
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txen-skew-ps = <0>;
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txc-skew-ps = <3000>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <3000>;
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txd0-skew-ps = <0>;
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txd1-skew-ps = <0>;
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txd2-skew-ps = <0>;
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txd3-skew-ps = <0>;
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interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
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<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
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fsl,err006687-workaround-present;
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6q-sabrelite {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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/* SGTL5000 sys_mclk */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
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>;
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};
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
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MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
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MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
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MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
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>;
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};
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
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>;
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};
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pinctrl_can_xcvr: can-xcvrgrp {
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fsl,pins = <
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/* Flexcan XCVR enable */
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
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/* Phy reset */
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MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
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MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
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>;
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};
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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/* Power Button */
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MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
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/* Menu Button */
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MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
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/* Home Button */
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MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
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/* Back Button */
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MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
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/* Volume Up Button */
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MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
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/* Volume Down Button */
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MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_j15: j15grp {
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fsl,pins = <
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MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
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MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
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MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
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MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
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MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
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MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
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MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
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MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
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MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
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MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
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MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
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MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
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MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
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MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
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MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
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MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
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MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
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MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
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MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
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MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
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MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
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MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
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MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
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MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
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MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
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MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
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MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
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MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm4: pwm4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
|
/* power enable, high active */
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
|
|
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ipu1_di0_disp0 {
|
|
remote-endpoint = <&lcd_display_in>;
|
|
};
|
|
|
|
&ldb {
|
|
status = "okay";
|
|
|
|
lvds-channel@0 {
|
|
fsl,data-mapping = "spwg";
|
|
fsl,data-width = <18>;
|
|
status = "okay";
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
|
|
lvds0_out: endpoint {
|
|
remote-endpoint = <&panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
|
|
vmmc-supply = <®_3p3v>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
|
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
|
vmmc-supply = <®_3p3v>;
|
|
status = "okay";
|
|
};
|