e6747e24f1
The qcom,gpucc bindings had a few problems with them:
1. When things were converted to yaml the name of the "gpll0 main"
clock got changed from "gpll0" to "gpll0_main". Change it back for
msm8998.
2. Apparently there is a push not to use purist aliases for clocks but
instead to just use the internal Qualcomm names. For sdm845 and
sc7180 (where the drivers haven't already been changed) move in
this direction.
Things were also getting complicated harder to deal with by jamming
several SoCs into one file. Splitting simplifies things.
Fixes: 5c6f3a36b9 ("dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lkml.kernel.org/r/20200203103049.v4.7.I513cd73b16665065ae6c22cf594d8b543745e28c@changeid
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
73 lines
1.6 KiB
YAML
73 lines
1.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,sc7180-gpucc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Graphics Clock & Reset Controller Binding for SC7180
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maintainers:
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm graphics clock control module which supports the clocks, resets and
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power domains on SC7180.
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See also dt-bindings/clock/qcom,gpucc-sc7180.h.
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properties:
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compatible:
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const: qcom,sc7180-gpucc
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clocks:
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items:
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- description: Board XO source
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- description: GPLL0 main branch source
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- description: GPLL0 div branch source
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clock-names:
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items:
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- const: bi_tcxo
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- const: gcc_gpu_gpll0_clk_src
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- const: gcc_gpu_gpll0_div_clk_src
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc7180.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@5090000 {
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compatible = "qcom,sc7180-gpucc";
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reg = <0 0x05090000 0 0x9000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc GCC_GPU_GPLL0_CLK_SRC>,
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<&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
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clock-names = "bi_tcxo",
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"gcc_gpu_gpll0_clk_src",
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"gcc_gpu_gpll0_div_clk_src";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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