linux/include/soc
Vladimir Oltean e5d1f896fd net: mscc: ocelot: support L2 multicast entries
There is one main difference in mscc_ocelot between IP multicast and L2
multicast. With IP multicast, destination ports are encoded into the
upper bytes of the multicast MAC address. Example: to deliver the
address 01:00:5E:11:22:33 to ports 3, 8, and 9, one would need to
program the address of 00:03:08:11:22:33 into hardware. Whereas for L2
multicast, the MAC table entry points to a Port Group ID (PGID), and
that PGID contains the port mask that the packet will be forwarded to.
As to why it is this way, no clue. My guess is that not all port
combinations can be supported simultaneously with the limited number of
PGIDs, and this was somehow an issue for IP multicast but not for L2
multicast. Anyway.

Prior to this change, the raw L2 multicast code was bogus, due to the
fact that there wasn't really any way to test it using the bridge code.
There were 2 issues:
- A multicast PGID was allocated for each MDB entry, but it wasn't in
  fact programmed to hardware. It was dummy.
- In fact we don't want to reserve a multicast PGID for every single MDB
  entry. That would be odd because we can only have ~60 PGIDs, but
  thousands of MDB entries. So instead, we want to reserve a multicast
  PGID for every single port combination for multicast traffic. And
  since we can have 2 (or more) MDB entries delivered to the same port
  group (and therefore PGID), we need to reference-count the PGIDs.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-30 18:25:56 -07:00
..
arc include/: replace HTTP links with HTTPS ones 2020-08-12 10:57:59 -07:00
at91 ARM: at91: add atmel tcb capabilities 2020-07-11 18:57:03 +02:00
bcm2835 Revert "firmware: raspberrypi: Introduce vl805 init routine" 2020-08-18 13:01:11 +02:00
brcmstb treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fsl soc: fsl: qman: fix -Wpacked-not-aligned warnings 2020-09-22 17:38:21 -05:00
imx ARM: imx: move cpu definitions into a header 2020-05-20 23:03:47 +08:00
mediatek iommu/mediatek: Clean up struct mtk_smi_iommu 2019-08-30 15:57:27 +02:00
mscc net: mscc: ocelot: support L2 multicast entries 2020-10-30 18:25:56 -07:00
nps irqchip/eznps: Fix build error for !ARC700 builds 2020-08-27 13:15:17 -07:00
qcom It looks like a smaller batch of clk updates this time around. In the core 2020-08-07 13:35:51 -07:00
rockchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive riscv: move sifive_l2_cache.h to include/soc 2020-01-12 10:12:44 -08:00
tegra soc/tegra: fuse: Add Tegra234 support 2020-09-18 15:55:29 +02:00