forked from Minki/linux
873591db59
On the HT-Omega Claro (halo) sound cards, the headphone amplifier must be enabled explicitly by setting a GPIO bit. Signed-off-by: Clemens Ladisch <clemens@ladisch.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
448 lines
12 KiB
C
448 lines
12 KiB
C
/*
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* C-Media CMI8788 driver for C-Media's reference design and similar models
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* SPI 0 -> 1st AK4396 (front)
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* SPI 1 -> 2nd AK4396 (surround)
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* SPI 2 -> 3rd AK4396 (center/LFE)
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* SPI 3 -> WM8785
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* SPI 4 -> 4th AK4396 (back)
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*
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* GPIO 0 -> DFS0 of AK5385
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* GPIO 1 -> DFS1 of AK5385
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* GPIO 8 -> enable headphone amplifier on HT-Omega models
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*/
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#include <linux/delay.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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#include <sound/ac97_codec.h>
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#include <sound/control.h>
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#include <sound/core.h>
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#include <sound/initval.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "oxygen.h"
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#include "ak4396.h"
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#include "wm8785.h"
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_DESCRIPTION("C-Media CMI8788 driver");
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MODULE_LICENSE("GPL v2");
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MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
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static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
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static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
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static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
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module_param_array(index, int, NULL, 0444);
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MODULE_PARM_DESC(index, "card index");
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module_param_array(id, charp, NULL, 0444);
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MODULE_PARM_DESC(id, "ID string");
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module_param_array(enable, bool, NULL, 0444);
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MODULE_PARM_DESC(enable, "enable card");
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enum {
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MODEL_CMEDIA_REF, /* C-Media's reference design */
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MODEL_MERIDIAN, /* AuzenTech X-Meridian */
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MODEL_CLARO, /* HT-Omega Claro */
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MODEL_CLARO_HALO, /* HT-Omega Claro halo */
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};
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static struct pci_device_id oxygen_ids[] __devinitdata = {
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
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{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
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{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
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{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, oxygen_ids);
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#define GPIO_AK5385_DFS_MASK 0x0003
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#define GPIO_AK5385_DFS_NORMAL 0x0000
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#define GPIO_AK5385_DFS_DOUBLE 0x0001
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#define GPIO_AK5385_DFS_QUAD 0x0002
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#define GPIO_CLARO_HP 0x0100
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struct generic_data {
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u8 ak4396_ctl2;
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u16 saved_wm8785_registers[2];
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};
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static void ak4396_write(struct oxygen *chip, unsigned int codec,
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u8 reg, u8 value)
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{
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/* maps ALSA channel pair number to SPI output */
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static const u8 codec_spi_map[4] = {
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0, 1, 2, 4
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};
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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OXYGEN_SPI_DATA_LENGTH_2 |
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OXYGEN_SPI_CLOCK_160 |
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(codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
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AK4396_WRITE | (reg << 8) | value);
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}
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static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
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{
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struct generic_data *data = chip->model_data;
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oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
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OXYGEN_SPI_DATA_LENGTH_2 |
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OXYGEN_SPI_CLOCK_160 |
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(3 << OXYGEN_SPI_CODEC_SHIFT) |
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OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
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(reg << 9) | value);
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if (reg < ARRAY_SIZE(data->saved_wm8785_registers))
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data->saved_wm8785_registers[reg] = value;
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}
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static void update_ak4396_volume(struct oxygen *chip)
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{
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unsigned int i;
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i,
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AK4396_LCH_ATT, chip->dac_volume[i * 2]);
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ak4396_write(chip, i,
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AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
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}
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}
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static void ak4396_registers_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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ak4396_write(chip, i,
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AK4396_CONTROL_2, data->ak4396_ctl2);
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ak4396_write(chip, i,
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AK4396_CONTROL_3, AK4396_PCM);
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}
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update_ak4396_volume(chip);
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}
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static void ak4396_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
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ak4396_registers_init(chip);
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snd_component_add(chip->card, "AK4396");
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}
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static void ak5385_init(struct oxygen *chip)
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{
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
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snd_component_add(chip->card, "AK5385");
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}
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static void wm8785_registers_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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wm8785_write(chip, WM8785_R7, 0);
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wm8785_write(chip, WM8785_R0, data->saved_wm8785_registers[0]);
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wm8785_write(chip, WM8785_R1, data->saved_wm8785_registers[1]);
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}
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static void wm8785_init(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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data->saved_wm8785_registers[0] = WM8785_MCR_SLAVE |
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WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
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data->saved_wm8785_registers[1] = WM8785_WL_24;
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wm8785_registers_init(chip);
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snd_component_add(chip->card, "WM8785");
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}
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static void generic_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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wm8785_init(chip);
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}
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static void meridian_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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ak5385_init(chip);
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}
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static void claro_enable_hp(struct oxygen *chip)
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{
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msleep(300);
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oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
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oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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wm8785_init(chip);
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claro_enable_hp(chip);
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}
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static void claro_halo_init(struct oxygen *chip)
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{
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ak4396_init(chip);
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ak5385_init(chip);
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claro_enable_hp(chip);
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}
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static void generic_cleanup(struct oxygen *chip)
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{
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}
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static void claro_disable_hp(struct oxygen *chip)
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{
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oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
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}
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static void claro_cleanup(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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static void claro_suspend(struct oxygen *chip)
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{
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claro_disable_hp(chip);
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}
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static void generic_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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wm8785_registers_init(chip);
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}
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static void meridian_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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}
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static void claro_resume(struct oxygen *chip)
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{
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ak4396_registers_init(chip);
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claro_enable_hp(chip);
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}
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static void set_ak4396_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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u8 value;
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value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
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if (params_rate(params) <= 54000)
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value |= AK4396_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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value |= AK4396_DFS_DOUBLE;
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else
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value |= AK4396_DFS_QUAD;
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data->ak4396_ctl2 = value;
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msleep(1); /* wait for the new MCLK to become stable */
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for (i = 0; i < 4; ++i) {
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB);
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ak4396_write(chip, i,
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AK4396_CONTROL_2, value);
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ak4396_write(chip, i,
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AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
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}
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}
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static void update_ak4396_mute(struct oxygen *chip)
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{
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struct generic_data *data = chip->model_data;
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unsigned int i;
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u8 value;
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value = data->ak4396_ctl2 & ~AK4396_SMUTE;
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if (chip->dac_mute)
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value |= AK4396_SMUTE;
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data->ak4396_ctl2 = value;
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for (i = 0; i < 4; ++i)
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ak4396_write(chip, i, AK4396_CONTROL_2, value);
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}
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static void set_wm8785_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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unsigned int value;
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wm8785_write(chip, WM8785_R7, 0);
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value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
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if (params_rate(params) <= 48000)
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value |= WM8785_OSR_SINGLE;
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else if (params_rate(params) <= 96000)
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value |= WM8785_OSR_DOUBLE;
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else
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value |= WM8785_OSR_QUAD;
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wm8785_write(chip, WM8785_R0, value);
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if (snd_pcm_format_width(params_format(params)) <= 16)
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value = WM8785_WL_16;
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else
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value = WM8785_WL_24;
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wm8785_write(chip, WM8785_R1, value);
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}
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static void set_ak5385_params(struct oxygen *chip,
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struct snd_pcm_hw_params *params)
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{
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unsigned int value;
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if (params_rate(params) <= 54000)
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value = GPIO_AK5385_DFS_NORMAL;
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else if (params_rate(params) <= 108000)
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value = GPIO_AK5385_DFS_DOUBLE;
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else
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value = GPIO_AK5385_DFS_QUAD;
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oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
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value, GPIO_AK5385_DFS_MASK);
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}
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static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
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static const struct oxygen_model model_generic = {
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.shortname = "C-Media CMI8788",
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.longname = "C-Media Oxygen HD Audio",
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.chip = "CMI8788",
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.init = generic_init,
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.cleanup = generic_cleanup,
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.resume = generic_resume,
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.set_dac_params = set_ak4396_params,
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.set_adc_params = set_wm8785_params,
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.update_dac_volume = update_ak4396_volume,
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.update_dac_mute = update_ak4396_mute,
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.dac_tlv = ak4396_db_scale,
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.model_data_size = sizeof(struct generic_data),
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.device_config = PLAYBACK_0_TO_I2S |
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PLAYBACK_1_TO_SPDIF |
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PLAYBACK_2_TO_AC97_1 |
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CAPTURE_0_FROM_I2S_1 |
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CAPTURE_1_FROM_SPDIF |
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CAPTURE_2_FROM_AC97_1,
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.dac_channels = 8,
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.dac_volume_min = 0,
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.dac_volume_max = 255,
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.function_flags = OXYGEN_FUNCTION_SPI |
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OXYGEN_FUNCTION_ENABLE_SPI_4_5,
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.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
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.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
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};
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static int __devinit get_oxygen_model(struct oxygen *chip,
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const struct pci_device_id *id)
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{
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chip->model = model_generic;
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switch (id->driver_data) {
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case MODEL_MERIDIAN:
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chip->model.init = meridian_init;
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chip->model.resume = meridian_resume;
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chip->model.set_adc_params = set_ak5385_params;
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chip->model.device_config = PLAYBACK_0_TO_I2S |
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PLAYBACK_1_TO_SPDIF |
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CAPTURE_0_FROM_I2S_2 |
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CAPTURE_1_FROM_SPDIF;
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break;
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case MODEL_CLARO:
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chip->model.init = claro_init;
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chip->model.cleanup = claro_cleanup;
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chip->model.suspend = claro_suspend;
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chip->model.resume = claro_resume;
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break;
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case MODEL_CLARO_HALO:
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chip->model.init = claro_halo_init;
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chip->model.cleanup = claro_cleanup;
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chip->model.suspend = claro_suspend;
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chip->model.resume = claro_resume;
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chip->model.set_adc_params = set_ak5385_params;
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break;
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}
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if (id->driver_data == MODEL_MERIDIAN ||
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id->driver_data == MODEL_CLARO_HALO) {
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chip->model.misc_flags = OXYGEN_MISC_MIDI;
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chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
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}
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return 0;
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}
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static int __devinit generic_oxygen_probe(struct pci_dev *pci,
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const struct pci_device_id *pci_id)
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{
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static int dev;
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int err;
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if (dev >= SNDRV_CARDS)
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return -ENODEV;
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if (!enable[dev]) {
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++dev;
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return -ENOENT;
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}
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err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
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oxygen_ids, get_oxygen_model);
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if (err >= 0)
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++dev;
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return err;
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}
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static struct pci_driver oxygen_driver = {
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.name = "CMI8788",
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.id_table = oxygen_ids,
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.probe = generic_oxygen_probe,
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.remove = __devexit_p(oxygen_pci_remove),
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#ifdef CONFIG_PM
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.suspend = oxygen_pci_suspend,
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.resume = oxygen_pci_resume,
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#endif
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};
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static int __init alsa_card_oxygen_init(void)
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{
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return pci_register_driver(&oxygen_driver);
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}
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static void __exit alsa_card_oxygen_exit(void)
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{
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pci_unregister_driver(&oxygen_driver);
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}
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module_init(alsa_card_oxygen_init)
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module_exit(alsa_card_oxygen_exit)
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