Boris BREZILLON e442d23440 clk: at91: add PMC master clock ... This patch adds new at91 master clock implementation using common clk framework. The master clock layout describe the MCKR register layout. There are 2 master clock layouts: - at91rm9200 - at91sam9x5 Master clocks are given characteristics: - min/max clock output rate These characteristics are checked during rate change to avoid over/underclocking. These characteristics are described in atmel's SoC datasheet in "Electrical Characteristics" paragraph. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>		2013-12-02 15:31:23 +01:00
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clk-main.c	clk: at91: add PMC main clock	2013-12-02 15:31:22 +01:00
clk-master.c	clk: at91: add PMC master clock	2013-12-02 15:31:23 +01:00
clk-pll.c	clk: at91: add PMC master clock	2013-12-02 15:31:23 +01:00
clk-plldiv.c	clk: at91: add PMC pll clocks	2013-12-02 15:31:22 +01:00
Makefile	clk: at91: add PMC master clock	2013-12-02 15:31:23 +01:00
pmc.c	clk: at91: add PMC master clock	2013-12-02 15:31:23 +01:00
pmc.h	clk: at91: add PMC master clock	2013-12-02 15:31:23 +01:00