forked from Minki/linux
fb8fa94319
Patch works around the below silicon errata: During LCDC initialization, there is the potential for a FIFO underflow condition to occur. A FIFO underflow condition occurs when the input FIFO is completely empty and the LCDC raster controller logic that drives data to the output pins attempts to fetch data from the FIFO. When a FIFO underflow condition occurs, incorrect data will be driven out on the LCDC data pins. Software should poll the FUF bit field in the LCD_STAT register to check if an error condition has occurred or service the interrupt if FUF_EN is enabled when FUF occurs. If the FUF bit field has been set to 1, this will indicate an underflow condition has occurred and then the software should execute a reset of the LCDC via the LPSC. This problem may occur if the LCDC FIFO threshold size (LCDDMA_CTRL[TH_FIFO_READY]) is left at its default value after reset. Increasing the FIFO threshold size will reduce or eliminate underflows. Setting the threshold size to 256 double words or larger is recommended. Above issue is described in section 2.1.3 of silicon errata http://www.ti.com/lit/er/sprz313e/sprz313e.pdf Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
108 lines
2.2 KiB
C
108 lines
2.2 KiB
C
/*
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* Header file for TI DA8XX LCD controller platform data.
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*
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* Copyright (C) 2008-2009 MontaVista Software Inc.
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* Copyright (C) 2008-2009 Texas Instruments Inc
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef DA8XX_FB_H
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#define DA8XX_FB_H
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enum panel_type {
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QVGA = 0
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};
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enum panel_shade {
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MONOCHROME = 0,
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COLOR_ACTIVE,
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COLOR_PASSIVE,
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};
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enum raster_load_mode {
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LOAD_DATA = 1,
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LOAD_PALETTE,
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};
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struct display_panel {
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enum panel_type panel_type; /* QVGA */
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int max_bpp;
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int min_bpp;
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enum panel_shade panel_shade;
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};
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struct da8xx_lcdc_platform_data {
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const char manu_name[10];
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void *controller_data;
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const char type[25];
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void (*panel_power_ctrl)(int);
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};
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struct lcd_ctrl_config {
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const struct display_panel *p_disp_panel;
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/* AC Bias Pin Frequency */
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int ac_bias;
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/* AC Bias Pin Transitions per Interrupt */
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int ac_bias_intrpt;
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/* DMA burst size */
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int dma_burst_sz;
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/* Bits per pixel */
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int bpp;
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/* FIFO DMA Request Delay */
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int fdd;
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/* TFT Alternative Signal Mapping (Only for active) */
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unsigned char tft_alt_mode;
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/* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
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unsigned char stn_565_mode;
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/* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
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unsigned char mono_8bit_mode;
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/* Invert line clock */
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unsigned char invert_line_clock;
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/* Invert frame clock */
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unsigned char invert_frm_clock;
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/* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
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unsigned char sync_edge;
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/* Horizontal and Vertical Sync: Control: 0=ignore */
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unsigned char sync_ctrl;
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/* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
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unsigned char raster_order;
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/* DMA FIFO threshold */
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int fifo_th;
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};
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struct lcd_sync_arg {
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int back_porch;
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int front_porch;
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int pulse_width;
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};
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/* ioctls */
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#define FBIOGET_CONTRAST _IOR('F', 1, int)
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#define FBIOPUT_CONTRAST _IOW('F', 2, int)
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#define FBIGET_BRIGHTNESS _IOR('F', 3, int)
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#define FBIPUT_BRIGHTNESS _IOW('F', 3, int)
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#define FBIGET_COLOR _IOR('F', 5, int)
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#define FBIPUT_COLOR _IOW('F', 6, int)
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#define FBIPUT_HSYNC _IOW('F', 9, int)
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#define FBIPUT_VSYNC _IOW('F', 10, int)
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#endif /* ifndef DA8XX_FB_H */
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