Alex Deucher db9635cc14 drm/amdgpu: used cached gca values for vi_read_register (v2) ... Using the cached values has less latency for bare metal and SR-IOV, and prevents reading back bogus values if the engine is powergated. v2: fix typo in tile idx calculation Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2016-10-25 14:38:32 -04:00
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drm	drm/amdgpu: used cached gca values for vi_read_register (v2)	2016-10-25 14:38:32 -04:00
host1x	drm/tegra: dsi: Enhance runtime power management	2016-08-24 15:58:57 +02:00
ipu-v3	gpu: Remove depends on RESET_CONTROLLER when not a provider	2016-10-19 09:26:15 +02:00
vga	drivers/gpu/vga: allocate vga_arb_write() buffer on stack	2016-10-17 08:21:14 +02:00
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