The MSIIR register for each MSI bank is aliased to a different address. The MSI node reg property was updated to contain this address: e.g. reg = <0x41600 0x200 0x44140 4>; The first region contains the address and length of the MSI register set and the second region contains the address of the aliased MSIIR register at 0x44140. Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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.. | ||
cpm_qe | ||
board.txt | ||
cache_sram.txt | ||
dcsr.txt | ||
diu.txt | ||
dma.txt | ||
ecm.txt | ||
gtm.txt | ||
guts.txt | ||
ifc.txt | ||
lbc.txt | ||
mcm.txt | ||
mcu-mpc8349emitx.txt | ||
mpc5121-psc.txt | ||
mpc5200.txt | ||
mpic-timer.txt | ||
mpic.txt | ||
msi-pic.txt | ||
pmc.txt | ||
srio-rmu.txt | ||
srio.txt | ||
ssi.txt |