Waibel Georg d5b2b22558 clk: imx: imx6ul: change flexcan clock to support CiA bitrates ... Setting a CAN bitrate of 800kbit/s fails with a bitrate error of 1.3% if the flexcan module is clocked at 30MHz (CAN_CLK_ROOT). This patch changes the clock frequency from 30MHz to 40MHz which allows to support all bitrates recommended by CiA. The patch sets CAN_CLK_SEL to 80MHz by changing its clock parent from CLK_PLL3_60M to CLK_PLL3_80M. The post-divider CAN_CLK_PODF is set to /2 by default which makes 40MHz CAN_CLK_ROOT from its parent CAN_CLK_SEL. Background: CAN in Automation document 102 (CiA102) recommends the CAN bitrates 10, 20, 50, 125, 250, 500, 800 and 1000kbit/s. With the flexcan serial clock at 30MHz (original value) setting some common bitrates ("ip link set canX type can bitrate <bitrate>") gives the following results: requested value / actually set value 5000: bitrate 5000 sample-point 0.708 10000: bitrate 10000 sample-point 0.866 20000: bitrate 20000 sample-point 0.866 40000: bitrate 40000 sample-point 0.866 50000: bitrate 50000 sample-point 0.866 80000: bitrate 80000 sample-point 0.866 100000: bitrate 100000 sample-point 0.866 125000: bitrate 125000 sample-point 0.875 250000: bitrate 250000 sample-point 0.866 400000: bitrate 400000 sample-point 0.866 500000: bitrate 500000 sample-point 0.866 666666: bitrate 666666 sample-point 0.800 800000: bitrate 789473 sample-point 0.789 !!!bitrate error 1.3% 1000000: bitrate 1000000 sample-point 0.733 With the flexcan serial clock at 40MHz (new value) we get this: 5000: no more possible 10000: bitrate 10000 sample-point 0.875 20000: bitrate 20000 sample-point 0.875 40000: bitrate 40000 sample-point 0.850 50000: bitrate 50000 sample-point 0.875 80000: bitrate 80000 sample-point 0.850 100000: bitrate 100000 sample-point 0.875 125000: bitrate 125000 sample-point 0.875 250000: bitrate 250000 sample-point 0.875 400000: bitrate 400000 sample-point 0.850 500000: bitrate 500000 sample-point 0.875 666666: bitrate 666666 sample-point 0.800 800000: bitrate 800000 sample-point 0.800 1000000: bitrate 1000000 sample-point 0.750 A drawback of the modification is that 5kbit/s is no more supported. Setting the flexcan serial clock to 60MHz or 80MHz would produce similar results but with losing even more bitrates at the lower end. Changing the flexcan serial clock to 40MHz might apply for other SoCs using the flaxcan module as well (e.g. imx6q/d/s..). But since I don't have such hardware to test I did not add this to the patch. Signed-off-by: Georg Waibel <georg.waibel@wiedemann-group.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2020-04-13 22:22:33 +08:00
..
clk-busy.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-composite-7ulp.c	clk: imx: imx7ulp composite: Rename to show is clk_hw based	2019-12-11 19:19:48 +08:00
clk-composite-8m.c	clk: imx: drop redundant initialization	2020-02-17 14:32:32 +08:00
clk-cpu.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-divider-gate.c	clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based	2019-12-11 19:19:59 +08:00
clk-fixup-div.c	clk: imx: drop redundant initialization	2020-02-17 14:32:32 +08:00
clk-fixup-mux.c	clk: imx: drop redundant initialization	2020-02-17 14:32:32 +08:00
clk-frac-pll.c	clk: imx: Rename sccg and frac pll register to suggest clk_hw	2019-12-11 19:19:50 +08:00
clk-gate2.c	clk: imx: clk-gate2: Pass the device to the register function	2020-03-16 09:38:30 +08:00
clk-gate-exclusive.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-imx1.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336	2019-06-05 17:37:07 +02:00
clk-imx5.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-imx6q.c	clk: imx6q: disable non functional divider	2019-12-09 10:09:12 +08:00
clk-imx6sl.c	clk: imx6sl: Add missing of_node_put()	2020-02-17 14:37:21 +08:00
clk-imx6sll.c	clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code	2019-10-28 16:46:45 +08:00
clk-imx6sx.c	clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code	2019-10-28 16:46:50 +08:00
clk-imx6ul.c	clk: imx: imx6ul: change flexcan clock to support CiA bitrates	2020-04-13 22:22:33 +08:00
clk-imx7d.c	clk: imx7d: Add PXP clock	2020-03-16 08:56:59 +08:00
clk-imx7ulp.c	clk: imx7ulp: Include clk-provider.h instead of clk.h	2020-02-17 14:33:37 +08:00
clk-imx8mm.c	clk: imx8mm: A53 core clock no need to be critical	2020-03-11 15:11:57 +08:00
clk-imx8mn.c	clk: imx8mn: A53 core clock no need to be critical	2020-03-11 15:11:43 +08:00
clk-imx8mp.c	There's not much to see in the core framework this time around. Instead the	2020-04-05 10:43:32 -07:00
clk-imx8mq.c	clk: imx8mq: A53 core clock no need to be critical	2020-03-11 15:12:02 +08:00
clk-imx8qxp-lpcg.c	clk: imx8qxp-lpcg: Warn against devm_platform_ioremap_resource	2019-12-11 16:06:10 +08:00
clk-imx8qxp-lpcg.h	clk: imx: add imx8qxp lpcg driver	2018-12-14 13:01:14 -08:00
clk-imx8qxp.c	clk: imx: scu: add fallback compatible string support	2019-02-21 12:41:16 -08:00
clk-imx21.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk-imx25.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 1	2019-05-21 11:28:39 +02:00
clk-imx27.c	clk: Remove io.h from clk-provider.h	2019-05-15 13:21:37 -07:00
clk-imx31.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 21	2019-05-21 11:28:47 +02:00
clk-imx35.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
clk-lpcg-scu.c	clk: imx: add lpcg clock support	2018-12-14 13:00:51 -08:00
clk-pfd.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-pfdv2.c	clk: imx: pfdv2: determine best parent rate	2020-03-10 14:02:02 +08:00
clk-pll14xx.c	clk: imx: pll14xx: Return error if pll type is invalid	2020-02-24 15:41:13 +08:00
clk-pllv1.c	clk: imx: pllv1: Switch to clk_hw based API	2019-12-11 19:19:41 +08:00
clk-pllv2.c	clk: imx: pllv2: Switch to clk_hw based API	2019-12-11 19:19:44 +08:00
clk-pllv3.c	This round of clk driver and framework updates is heavy on the driver update	2019-07-17 10:07:48 -07:00
clk-pllv4.c	clk: imx: pllv4: use prepare/unprepare	2020-03-10 14:02:16 +08:00
clk-scu.c	clk: imx: Align imx sc clock parent msg structs to 4	2020-03-25 18:46:05 -07:00
clk-scu.h	clk: imx: scu: add set parent support	2019-02-21 12:41:16 -08:00
clk-sscg-pll.c	clk: imx: clk-sscg-pll: Drop unnecessary initialization	2020-02-24 15:49:25 +08:00
clk-vf610.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	2019-05-30 11:26:32 -07:00
clk.c	clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API	2019-12-23 11:50:54 +08:00
clk.h	clk: imx: composite-8m: add imx8m_clk_hw_composite_core	2020-02-14 10:49:18 +08:00
Kconfig	clk: imx: Add support for i.MX8MP clock driver	2020-01-12 14:07:36 +08:00
Makefile	clk: imx: Add support for i.MX8MP clock driver	2020-01-12 14:07:36 +08:00