cea3a330ee
The pixel clock gets enabled early during init, since it's required in order to read registers. This pixel clock must be disabled if errors during this init phase. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Philippe Cornu <philippe.cornu@st.com> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: https://patchwork.freedesktop.org/patch/msgid/1500277223-29553-2-git-send-email-philippe.cornu@st.com |
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drm | ||
host1x | ||
ipu-v3 | ||
vga | ||
Makefile |