forked from Minki/linux
cd4f2d4aa7
This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported. The TIMING2 register value is wrong in the documentation for i.MX28! This was found and fixed by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
500 lines
9.6 KiB
Plaintext
500 lines
9.6 KiB
Plaintext
/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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interrupt-parent = <&icoll>;
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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gpio4 = &gpio4;
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saif0 = &saif0;
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saif1 = &saif1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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apb@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x80000>;
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ranges;
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apbh@80000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x3c900>;
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ranges;
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icoll: interrupt-controller@80000000 {
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compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x80000000 0x2000>;
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};
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hsadc@80002000 {
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reg = <0x80002000 2000>;
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interrupts = <13 87>;
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status = "disabled";
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};
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dma-apbh@80004000 {
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compatible = "fsl,imx28-dma-apbh";
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reg = <0x80004000 2000>;
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};
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perfmon@80006000 {
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reg = <0x80006000 800>;
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interrupts = <27>;
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status = "disabled";
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};
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bch@8000a000 {
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reg = <0x8000a000 2000>;
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interrupts = <41>;
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status = "disabled";
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};
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gpmi@8000c000 {
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reg = <0x8000c000 2000>;
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interrupts = <42 88>;
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status = "disabled";
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};
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ssp0: ssp@80010000 {
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reg = <0x80010000 2000>;
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interrupts = <96 82>;
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fsl,ssp-dma-channel = <0>;
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status = "disabled";
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};
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ssp1: ssp@80012000 {
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reg = <0x80012000 2000>;
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interrupts = <97 83>;
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fsl,ssp-dma-channel = <1>;
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status = "disabled";
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};
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ssp2: ssp@80014000 {
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reg = <0x80014000 2000>;
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interrupts = <98 84>;
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fsl,ssp-dma-channel = <2>;
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status = "disabled";
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};
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ssp3: ssp@80016000 {
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reg = <0x80016000 2000>;
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interrupts = <99 85>;
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fsl,ssp-dma-channel = <3>;
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status = "disabled";
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};
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pinctrl@80018000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-pinctrl", "simple-bus";
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reg = <0x80018000 2000>;
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gpio0: gpio@0 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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interrupts = <127>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio1: gpio@1 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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interrupts = <126>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@2 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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interrupts = <125>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@3 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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interrupts = <124>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@4 {
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compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
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interrupts = <123>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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duart_pins_a: duart@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x3102 0x3112>;
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fsl,drive-strength = <0>;
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fsl,voltage = <1>;
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fsl,pull-up = <0>;
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};
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mac0_pins_a: mac0@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x4000 0x4010 0x4020
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0x4030 0x4040 0x4060 0x4070
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0x4080 0x4100>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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mac1_pins_a: mac1@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
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0x40e1 0x40b1 0x40c1>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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mmc0_8bit_pins_a: mmc0-8bit@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x2000 0x2010 0x2020
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0x2030 0x2040 0x2050 0x2060
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0x2070 0x2080 0x2090 0x20a0>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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mmc0_cd_cfg: mmc0-cd-cfg {
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fsl,pinmux-ids = <0x2090>;
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fsl,pull-up = <0>;
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};
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mmc0_sck_cfg: mmc0-sck-cfg {
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fsl,pinmux-ids = <0x20a0>;
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fsl,drive-strength = <2>;
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fsl,pull-up = <0>;
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};
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i2c0_pins_a: i2c0@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x3180 0x3190>;
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fsl,drive-strength = <1>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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saif0_pins_a: saif0@0 {
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reg = <0>;
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fsl,pinmux-ids =
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<0x3140 0x3150 0x3160 0x3170>;
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fsl,drive-strength = <2>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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saif1_pins_a: saif1@0 {
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reg = <0>;
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fsl,pinmux-ids = <0x31a0>;
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fsl,drive-strength = <2>;
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fsl,voltage = <1>;
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fsl,pull-up = <1>;
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};
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};
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digctl@8001c000 {
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reg = <0x8001c000 2000>;
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interrupts = <89>;
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status = "disabled";
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};
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etm@80022000 {
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reg = <0x80022000 2000>;
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status = "disabled";
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};
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dma-apbx@80024000 {
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compatible = "fsl,imx28-dma-apbx";
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reg = <0x80024000 2000>;
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};
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dcp@80028000 {
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reg = <0x80028000 2000>;
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interrupts = <52 53 54>;
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status = "disabled";
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};
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pxp@8002a000 {
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reg = <0x8002a000 2000>;
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interrupts = <39>;
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status = "disabled";
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};
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ocotp@8002c000 {
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reg = <0x8002c000 2000>;
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status = "disabled";
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};
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axi-ahb@8002e000 {
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reg = <0x8002e000 2000>;
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status = "disabled";
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};
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lcdif@80030000 {
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reg = <0x80030000 2000>;
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interrupts = <38 86>;
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status = "disabled";
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};
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can0: can@80032000 {
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reg = <0x80032000 2000>;
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interrupts = <8>;
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status = "disabled";
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};
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can1: can@80034000 {
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reg = <0x80034000 2000>;
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interrupts = <9>;
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status = "disabled";
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};
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simdbg@8003c000 {
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reg = <0x8003c000 200>;
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status = "disabled";
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};
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simgpmisel@8003c200 {
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reg = <0x8003c200 100>;
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status = "disabled";
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};
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simsspsel@8003c300 {
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reg = <0x8003c300 100>;
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status = "disabled";
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};
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simmemsel@8003c400 {
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reg = <0x8003c400 100>;
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status = "disabled";
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};
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gpiomon@8003c500 {
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reg = <0x8003c500 100>;
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status = "disabled";
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};
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simenet@8003c700 {
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reg = <0x8003c700 100>;
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status = "disabled";
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};
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armjtag@8003c800 {
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reg = <0x8003c800 100>;
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status = "disabled";
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};
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};
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apbx@80040000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80040000 0x40000>;
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ranges;
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clkctl@80040000 {
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reg = <0x80040000 2000>;
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status = "disabled";
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};
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saif0: saif@80042000 {
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compatible = "fsl,imx28-saif";
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reg = <0x80042000 2000>;
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interrupts = <59 80>;
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fsl,saif-dma-channel = <4>;
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status = "disabled";
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};
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power@80044000 {
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reg = <0x80044000 2000>;
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status = "disabled";
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};
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saif1: saif@80046000 {
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compatible = "fsl,imx28-saif";
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reg = <0x80046000 2000>;
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interrupts = <58 81>;
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fsl,saif-dma-channel = <5>;
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status = "disabled";
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};
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lradc@80050000 {
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reg = <0x80050000 2000>;
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status = "disabled";
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};
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spdif@80054000 {
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reg = <0x80054000 2000>;
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interrupts = <45 66>;
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status = "disabled";
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};
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rtc@80056000 {
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reg = <0x80056000 2000>;
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interrupts = <28 29>;
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status = "disabled";
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};
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i2c0: i2c@80058000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-i2c";
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reg = <0x80058000 2000>;
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interrupts = <111 68>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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i2c1: i2c@8005a000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx28-i2c";
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reg = <0x8005a000 2000>;
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interrupts = <110 69>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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pwm@80064000 {
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reg = <0x80064000 2000>;
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status = "disabled";
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};
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timrot@80068000 {
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reg = <0x80068000 2000>;
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status = "disabled";
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};
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auart0: serial@8006a000 {
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reg = <0x8006a000 0x2000>;
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interrupts = <112 70 71>;
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status = "disabled";
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};
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auart1: serial@8006c000 {
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reg = <0x8006c000 0x2000>;
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interrupts = <113 72 73>;
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status = "disabled";
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};
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auart2: serial@8006e000 {
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reg = <0x8006e000 0x2000>;
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interrupts = <114 74 75>;
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status = "disabled";
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};
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auart3: serial@80070000 {
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reg = <0x80070000 0x2000>;
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interrupts = <115 76 77>;
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status = "disabled";
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};
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auart4: serial@80072000 {
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reg = <0x80072000 0x2000>;
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interrupts = <116 78 79>;
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status = "disabled";
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};
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duart: serial@80074000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x80074000 0x1000>;
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interrupts = <47>;
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status = "disabled";
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};
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usbphy0: usbphy@8007c000 {
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reg = <0x8007c000 0x2000>;
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status = "disabled";
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};
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usbphy1: usbphy@8007e000 {
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reg = <0x8007e000 0x2000>;
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status = "disabled";
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};
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};
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};
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ahb@80080000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80080000 0x80000>;
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ranges;
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usbctrl0: usbctrl@80080000 {
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reg = <0x80080000 0x10000>;
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status = "disabled";
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};
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usbctrl1: usbctrl@80090000 {
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reg = <0x80090000 0x10000>;
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status = "disabled";
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};
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dflpt@800c0000 {
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reg = <0x800c0000 0x10000>;
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status = "disabled";
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};
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mac0: ethernet@800f0000 {
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compatible = "fsl,imx28-fec";
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reg = <0x800f0000 0x4000>;
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interrupts = <101>;
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status = "disabled";
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};
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mac1: ethernet@800f4000 {
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compatible = "fsl,imx28-fec";
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reg = <0x800f4000 0x4000>;
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interrupts = <102>;
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status = "disabled";
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};
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switch@800f8000 {
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reg = <0x800f8000 0x8000>;
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status = "disabled";
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};
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};
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};
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