52916982af
Some PCI devices may have memory mapped in a BAR space that's intended for use in peer-to-peer transactions. To enable such transactions the memory must be registered with ZONE_DEVICE pages so it can be used by DMA interfaces in existing drivers. Add an interface for other subsystems to find and allocate chunks of P2P memory as necessary to facilitate transfers between two PCI peers: struct pci_dev *pci_p2pmem_find[_many](); int pci_p2pdma_distance[_many](); void *pci_alloc_p2pmem(); The new interface requires a driver to collect a list of client devices involved in the transaction then call pci_p2pmem_find() to obtain any suitable P2P memory. Alternatively, if the caller knows a device which provides P2P memory, they can use pci_p2pdma_distance() to determine if it is usable. With a suitable p2pmem device, memory can then be allocated with pci_alloc_p2pmem() for use in DMA transactions. Depending on hardware, using peer-to-peer memory may reduce the bandwidth of the transfer but can significantly reduce pressure on system memory. This may be desirable in many cases: for example a system could be designed with a small CPU connected to a PCIe switch by a small number of lanes which would maximize the number of lanes available to connect to NVMe devices. The code is designed to only utilize the p2pmem device if all the devices involved in a transfer are behind the same PCI bridge. This is because we have no way of knowing whether peer-to-peer routing between PCIe Root Ports is supported (PCIe r4.0, sec 1.3.1). Additionally, the benefits of P2P transfers that go through the RC is limited to only reducing DRAM usage and, in some cases, coding convenience. The PCI-SIG may be exploring adding a new capability bit to advertise whether this is possible for future hardware. This commit includes significant rework and feedback from Christoph Hellwig. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> [bhelgaas: fold in fix from Keith Busch <keith.busch@intel.com>: https://lore.kernel.org/linux-pci/20181012155920.15418-1-keith.busch@intel.com, to address comment from Dan Carpenter <dan.carpenter@oracle.com>, fold in https://lore.kernel.org/linux-pci/20181017160510.17926-1-logang@deltatee.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
168 lines
4.7 KiB
Plaintext
168 lines
4.7 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# PCI configuration
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#
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source "drivers/pci/pcie/Kconfig"
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config PCI_MSI
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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depends on PCI
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select GENERIC_MSI_IRQ
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help
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This allows device drivers to enable MSI (Message Signaled
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Interrupts). Message Signaled Interrupts enable a device to
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generate an interrupt using an inbound Memory Write on its
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PCI bus instead of asserting a device IRQ pin.
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Use of PCI MSI interrupts can be disabled at kernel boot time
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by using the 'pci=nomsi' option. This disables MSI for the
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entire system.
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If you don't know what to do here, say Y.
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config PCI_MSI_IRQ_DOMAIN
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def_bool ARC || ARM || ARM64 || X86
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depends on PCI_MSI
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select GENERIC_MSI_IRQ_DOMAIN
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config PCI_QUIRKS
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default y
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bool "Enable PCI quirk workarounds" if EXPERT
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depends on PCI
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help
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This enables workarounds for various PCI chipset bugs/quirks.
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Disable this only if your target machine is unaffected by PCI
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quirks.
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config PCI_DEBUG
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bool "PCI Debugging"
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depends on PCI && DEBUG_KERNEL
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help
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Say Y here if you want the PCI core to produce a bunch of debug
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messages to the system log. Select this if you are having a
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problem with PCI support and want to see more of what is going on.
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When in doubt, say N.
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config PCI_REALLOC_ENABLE_AUTO
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bool "Enable PCI resource re-allocation detection"
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depends on PCI
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depends on PCI_IOV
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help
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Say Y here if you want the PCI core to detect if PCI resource
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re-allocation needs to be enabled. You can always use pci=realloc=on
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or pci=realloc=off to override it. It will automatically
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re-allocate PCI resources if SR-IOV BARs have not been allocated by
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the BIOS.
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When in doubt, say N.
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config PCI_STUB
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tristate "PCI Stub driver"
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depends on PCI
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help
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Say Y or M here if you want be able to reserve a PCI device
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when it is going to be assigned to a guest operating system.
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When in doubt, say N.
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config PCI_PF_STUB
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tristate "PCI PF Stub driver"
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depends on PCI
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depends on PCI_IOV
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help
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Say Y or M here if you want to enable support for devices that
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require SR-IOV support, while at the same time the PF itself is
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not providing any actual services on the host itself such as
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storage or networking.
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When in doubt, say N.
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config XEN_PCIDEV_FRONTEND
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tristate "Xen PCI Frontend"
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depends on PCI && X86 && XEN
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select PCI_XEN
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select XEN_XENBUS_FRONTEND
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default y
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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config PCI_ATS
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bool
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config PCI_ECAM
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bool
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config PCI_LOCKLESS_CONFIG
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bool
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config PCI_IOV
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bool "PCI IOV support"
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depends on PCI
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select PCI_ATS
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help
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I/O Virtualization is a PCI feature supported by some devices
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which allows them to create virtual devices which share their
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physical resources.
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If unsure, say N.
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config PCI_PRI
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bool "PCI PRI support"
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depends on PCI
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select PCI_ATS
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help
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PRI is the PCI Page Request Interface. It allows PCI devices that are
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behind an IOMMU to recover from page faults.
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If unsure, say N.
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config PCI_PASID
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bool "PCI PASID support"
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depends on PCI
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select PCI_ATS
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help
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Process Address Space Identifiers (PASIDs) can be used by PCI devices
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to access more than one IO address space at the same time. To make
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use of this feature an IOMMU is required which also supports PASIDs.
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Select this option if you have such an IOMMU and want to compile the
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driver for it into your kernel.
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If unsure, say N.
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config PCI_P2PDMA
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bool "PCI peer-to-peer transfer support"
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depends on PCI && ZONE_DEVICE
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select GENERIC_ALLOCATOR
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help
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Enableѕ drivers to do PCI peer-to-peer transactions to and from
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BARs that are exposed in other devices that are the part of
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the hierarchy where peer-to-peer DMA is guaranteed by the PCI
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specification to work (ie. anything below a single PCI bridge).
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Many PCIe root complexes do not support P2P transactions and
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it's hard to tell which support it at all, so at this time,
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P2P DMA transations must be between devices behind the same root
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port.
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If unsure, say N.
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config PCI_LABEL
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def_bool y if (DMI || ACPI)
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depends on PCI
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select NLS
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config PCI_HYPERV
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tristate "Hyper-V PCI Frontend"
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depends on PCI && X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64
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help
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The PCI device frontend driver allows the kernel to import arbitrary
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PCI devices from a PCI backend to support PCI driver domains.
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source "drivers/pci/hotplug/Kconfig"
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source "drivers/pci/controller/Kconfig"
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source "drivers/pci/endpoint/Kconfig"
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source "drivers/pci/switch/Kconfig"
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