Marc Zyngier cd448b24c6 Merge branch irq/misc-5.17 into irq/irqchip-next ...

* irq/misc-5.17:
  : .
  : Misc irqchip fixes:
  :
  : - Disable GICv4.1 RD's VPE table at boot time to avoid RAS errors
  : - Fix Ingenic TCU's u32/unsigned long abuse
  : - Some GICv2m constifying
  : - Mark imx_gpcv2_instance as __ro_after_init
  : - Enable a few missing IRQs on Spear
  : - Conversion to platform_get_irq_optional() for the Renesas irqchips
  : .
  irqchip/renesas-intc-irqpin: Use platform_get_irq_optional() to get the interrupt
  irqchip/renesas-irqc: Use platform_get_irq_optional() to get the interrupt
  irqchip/gic-v4: Disable redistributors' view of the VPE table at boot time
  irqchip/ingenic-tcu: Use correctly sized arguments for bit field
  irqchip/gic-v2m: Add const to of_device_id
  irqchip/imx-gpcv2: Mark imx_gpcv2_instance with __ro_after_init
  irqchip/spear-shirq: Add support for IRQ 0..6

Signed-off-by: Marc Zyngier <maz@kernel.org>

2021-12-20 14:00:47 +00:00

58 KiB

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