Claudiu Beznea 0b59e619ef clk: at91: sama7g5: set low limit for mck0 at 32KHz ...

MCK0 could go as low as 32KHz. Set this limit.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-15-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

2021-10-26 18:27:43 -07:00

..

at91rm9200.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

at91sam9g45.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

at91sam9n12.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

at91sam9rl.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

at91sam9x5.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

at91sam9260.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

clk-audio-pll.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

clk-generated.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-h32mx.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

clk-i2s-mux.c

clk: at91: move DT compatibility code to its own file

2018-10-17 10:45:39 -07:00

clk-main.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-master.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

clk-peripheral.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-pll.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-plldiv.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

clk-programmable.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-sam9x60-pll.c

clk: at91: clk-sam9x60-pll: add notifier for div part of PLL

2021-10-26 18:27:43 -07:00

clk-slow.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

clk-smd.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30 11:26:32 -07:00

clk-system.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-usb.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

clk-utmi.c

clk: at91: re-factor clocks suspend/resume

2021-10-26 18:27:41 -07:00

dt-compat.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

Makefile

clk: at91: sama7g5: add clock support for sama7g5

2020-07-24 02:19:09 -07:00

pmc.c

clk: at91: pmc: add sama7g5 to the list of available pmcs

2021-10-26 18:27:42 -07:00

pmc.h

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

sam9x60.c

clk: at91: clk-sam9x60-pll: add notifier for div part of PLL

2021-10-26 18:27:43 -07:00

sama5d2.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

sama5d3.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

sama5d4.c

clk: at91: clk-master: add notifier for divider

2021-10-26 18:27:43 -07:00

sama7g5.c

clk: at91: sama7g5: set low limit for mck0 at 32KHz

2021-10-26 18:27:43 -07:00

sckc.c

clk: at91: sckc: register slow_rc with accuracy option

2020-07-24 02:19:08 -07:00