c5f04b8d10
- the reset values for some pin groups in the tegra pin mux can result in functional errors due to conflicting with actively-configured pin groups muxing from the same controller. this change adds a known safe, non- conflicting mux for every pin group, which can be used on platforms where the pin group is not routed to any peripheral - also add each pin group's I/O voltage rail, to enable platform code to map from the pin groups used by each interface to the regulators used for dynamic voltage control - add routines to individually configure the tristate, pin mux and pull- ups for a pingroup_config array, so that it is possible to program individual values at run-time without modifying other values. this allows driver power-management code to reprogram individual interfaces into lower power states during idle / suspend, or to reprogram the pin mux to support multiple physical busses per internal controller (e.g., sharing a single I2C or SPI controller across multiple pin groups) - move chip-specific data like pingroups and drive-pingroups out of the common code and into chip-specific code - fix debug output for group with no pullups - add a TEGRA_MUX_SAFE function. Setting a pingroup to TEGRA_MUX_SAFE will automatically select a mux setting that is guaranteed not to conflict with any of the hardware blocks. Signed-off-by: Gary King <gking@nvidia.com>
16 lines
786 B
Makefile
16 lines
786 B
Makefile
obj-y += common.o
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obj-y += io.o
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obj-y += irq.o legacy_irq.o
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obj-y += clock.o
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obj-y += timer.o
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obj-y += gpio.o
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obj-y += pinmux.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clock.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o
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obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-t2-tables.o
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obj-$(CONFIG_SMP) += platsmp.o localtimer.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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obj-${CONFIG_MACH_HARMONY} += board-harmony.o
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obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
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