ae909ea4ad
Most of the more modern ColdFire cores use the same code to reset the CPU (but it is different to most of the earlier cores). Currently that is duplicated in each of the sub-arch files. Pull out this common code and out a single copy of it with the other common reset code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
33 lines
1.1 KiB
Makefile
33 lines
1.1 KiB
Makefile
#
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# Makefile for the m68knommu kernel.
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#
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#
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# If you want to play with the HW breakpoints then you will
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# need to add define this, which will give you a stack backtrace
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# on the console port whenever a DBG interrupt occurs. You have to
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# set up you HW breakpoints to trigger a DBG interrupt:
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#
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# ccflags-y := -DTRAP_DBG_INTERRUPT
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# asflags-y := -DTRAP_DBG_INTERRUPT
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#
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asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
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obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
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obj-$(CONFIG_M5206) += timers.o intc.o reset.o
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obj-$(CONFIG_M5206e) += timers.o intc.o reset.o
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obj-$(CONFIG_M520x) += pit.o intc-simr.o reset.o
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obj-$(CONFIG_M523x) += pit.o dma_timer.o intc-2.o reset.o
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obj-$(CONFIG_M5249) += timers.o intc.o reset.o
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obj-$(CONFIG_M527x) += pit.o intc-2.o reset.o
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obj-$(CONFIG_M5272) += timers.o
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obj-$(CONFIG_M528x) += pit.o intc-2.o reset.o
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obj-$(CONFIG_M5307) += timers.o intc.o reset.o
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obj-$(CONFIG_M532x) += timers.o intc-simr.o reset.o
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obj-$(CONFIG_M5407) += timers.o intc.o reset.o
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obj-$(CONFIG_M54xx) += sltimers.o intc-2.o
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obj-y += pinmux.o gpio.o
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extra-y := head.o
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