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linux/drivers/gpu/drm/i915/gt
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Chris Wilson a97b786bfa drm/i915/gt: Stage the transfer of the virtual breadcrumb 
We move the virtual breadcrumb from one physical engine to the next, if
the next virtual request is scheduled on a new physical engine. Since
the virtual context can only be in one signal queue, we need it to track
the current physical engine for the new breadcrumbs. However, to move
the list we need both breadcrumb locks -- and since we cannot take both
at the same time (unless we are careful and always ensure consistent
ordering) stage the movement of the signaler via the current virtual
request.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1510
Fixes: 6d06779e86 ("drm/i915: Load balancing across a virtual engine")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200325130059.30600-1-chris@chris-wilson.co.uk
(cherry picked from commit 6c81e21a47)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2020-03-26 10:21:30 -07:00
..
selftests
…
uc
drm/i915: Apply i915_request_skip() on submission
2020-03-04 14:29:50 +00:00
debugfs_engines.c
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debugfs_engines.h
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debugfs_gt_pm.c
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debugfs_gt_pm.h
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debugfs_gt.c
…
debugfs_gt.h
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gen6_ppgtt.c
Merge tag 'drm-next-2020-01-30' of git://anongit.freedesktop.org/drm/drm
2020-01-30 08:04:01 -08:00
gen6_ppgtt.h
…
gen6_renderstate.c
…
gen7_renderclear.c
drm/i915/gen7: Clear all EU/L3 residual contexts
2020-03-06 08:59:06 +00:00
gen7_renderclear.h
drm/i915/gen7: Clear all EU/L3 residual contexts
2020-03-06 08:59:06 +00:00
gen7_renderstate.c
…
gen8_ppgtt.c
drm/i915/vgpu: improve vgpu abstractions
2020-03-03 17:46:54 +02:00
gen8_ppgtt.h
…
gen8_renderstate.c
…
gen9_renderstate.c
…
hsw_clear_kernel.c
drm/i915/gen7: Clear all EU/L3 residual contexts
2020-03-06 08:59:06 +00:00
intel_breadcrumbs.c
drm/i915/gt: Prevent queuing retire workers on the virtual engine
2020-02-07 10:54:49 +00:00
intel_context_param.c
drm/i915: Allow userspace to specify ringsize on construction
2020-02-25 19:23:19 +00:00
intel_context_param.h
drm/i915: Allow userspace to specify ringsize on construction
2020-02-25 19:23:19 +00:00
intel_context_sseu.c
drm/i915/gt: Pull sseu context updates under gt
2020-02-04 10:14:03 +00:00
intel_context_types.h
drm/i915: Use explicit flag to mark unreachable intel_context
2020-03-26 10:21:04 -07:00
intel_context.c
drm/i915: Use explicit flag to mark unreachable intel_context
2020-03-26 10:21:04 -07:00
intel_context.h
drm/i915: Use explicit flag to mark unreachable intel_context
2020-03-26 10:21:04 -07:00
intel_engine_cs.c
drm/i915/gen12: Disable preemption timeout
2020-03-12 13:46:01 +00:00
intel_engine_heartbeat.c
drm/i915/gt: Fix up missing error propagation for heartbeat pulses
2020-02-18 20:32:21 +00:00
intel_engine_heartbeat.h
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intel_engine_pm.c
drm/i915/gt: Include a tell-tale for engine parking
2020-01-22 17:10:15 +00:00
intel_engine_pm.h
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intel_engine_pool_types.h
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intel_engine_pool.c
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intel_engine_pool.h
…
intel_engine_types.h
drm/i915/gt: Expose busywait duration to sysfs
2020-02-28 22:03:41 +00:00
intel_engine_user.c
drm/i915/gt: Make WARN* drm specific where drm_priv ptr is available
2020-01-22 17:53:37 +02:00
intel_engine_user.h
…
intel_engine.h
drm/i915/gt: Defend against concurrent updates to execlists->active
2020-03-09 20:38:57 +00:00
intel_ggtt.c
drm/i915/ggtt: do not set bits 1-11 in gen12 ptes
2020-02-27 22:38:11 +00:00
intel_gpu_commands.h
drm/i915/gen7: Clear all EU/L3 residual contexts
2020-03-06 08:59:06 +00:00
intel_gt_irq.c
drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPT
2020-01-29 15:16:52 +00:00
intel_gt_irq.h
drm/i915/gt: Reorganise gen8+ interrupt handler
2020-01-28 12:30:00 +00:00
intel_gt_pm_irq.c
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intel_gt_pm_irq.h
…
intel_gt_pm.c
drm/i915: extract engine WA programming to common resume function
2020-01-31 23:54:12 +00:00
intel_gt_pm.h
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intel_gt_requests.c
drm/i915/gt: Drop the timeline->mutex as we wait for retirement
2020-03-03 17:30:20 +00:00
intel_gt_requests.h
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intel_gt_types.h
…
intel_gt.c
drm/i915/gt: Wait for RCUs frees before asserting idle on unload
2020-03-12 20:47:24 +00:00
intel_gt.h
drm/i915/gt: Drop rogue space in the middle of GT_TRACE
2020-01-16 15:41:34 +00:00
intel_gtt.c
drm/i915/gt: Pull marking vm as closed underneath the vm->mutex
2020-02-28 12:33:07 +00:00
intel_gtt.h
drm/i915/gt: Pull marking vm as closed underneath the vm->mutex
2020-02-28 12:33:07 +00:00
intel_llc_types.h
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intel_llc.c
drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx
2020-02-19 22:27:10 +00:00
intel_llc.h
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intel_lrc_reg.h
drm/i915: Track hw reported context runtime
2020-02-16 15:16:22 +00:00
intel_lrc.c
drm/i915/gt: Stage the transfer of the virtual breadcrumb
2020-03-26 10:21:30 -07:00
intel_lrc.h
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intel_mocs.c
drm/i915/gt: Refactor l3cc/mocs availability
2020-02-19 14:09:18 +00:00
intel_mocs.h
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intel_ppgtt.c
…
intel_rc6_types.h
…
intel_rc6.c
drm/i915/gt: Select the deepest available parking mode for rc6
2020-03-26 10:21:30 -07:00
intel_rc6.h
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intel_renderstate.c
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intel_renderstate.h
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intel_reset_types.h
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intel_reset.c
drm/i915/gt: Cancel a hung context if already closed
2020-03-26 10:21:30 -07:00
intel_reset.h
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intel_ring_submission.c
drm/i915/gt: Restrict gen7 w/a batch to Haswell
2020-03-20 07:04:38 -07:00
intel_ring_types.h
drm/i915/gt: Avoid resetting ring->head outside of its timeline mutex
2020-02-11 12:03:22 +00:00
intel_ring.c
drm/i915/execlists: Always force a context reload when rewinding RING_TAIL
2020-02-07 21:41:46 +00:00
intel_ring.h
drm/i915/execlists: Always force a context reload when rewinding RING_TAIL
2020-02-07 21:41:46 +00:00
intel_rps_types.h
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intel_rps.c
drm/i915/gt: Treat idling as a RPS downclock event
2020-03-26 10:21:30 -07:00
intel_rps.h
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intel_sseu.c
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intel_sseu.h
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intel_timeline_types.h
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intel_timeline.c
drm/i915/gt: Close race between cacheline_retire and free
2020-03-07 00:05:54 +00:00
intel_timeline.h
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intel_workarounds_types.h
drm/i915/gt: Skip rmw for masked registers
2020-02-01 09:21:57 +00:00
intel_workarounds.c
drm/i915: Add Wa_1605460711 / Wa_1408767742 to ICL and EHL
2020-03-13 09:03:17 -07:00
intel_workarounds.h
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ivb_clear_kernel.c
drm/i915/gen7: Clear all EU/L3 residual contexts
2020-03-06 08:59:06 +00:00
mock_engine.c
drm/i915: Apply i915_request_skip() on submission
2020-03-04 14:29:50 +00:00
mock_engine.h
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selftest_context.c
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selftest_engine_cs.c
…
selftest_engine_heartbeat.c
drm/i915/selftests: Disable heartbeat around manual pulse tests
2020-02-28 09:25:41 +00:00
selftest_engine_pm.c
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selftest_engine.c
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selftest_engine.h
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selftest_gt_pm.c
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selftest_hangcheck.c
drm/i915: Apply i915_request_skip() on submission
2020-03-04 14:29:50 +00:00
selftest_llc.c
drm/i915/gt: Do not attempt to reprogram IA/ring frequencies for dgfx
2020-02-19 22:27:10 +00:00
selftest_llc.h
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selftest_lrc.c
drm/i915/selftest: Add more poison patterns
2020-03-13 11:36:34 +00:00
selftest_mocs.c
drm/i915/gt: Refactor l3cc/mocs availability
2020-02-19 14:09:18 +00:00
selftest_rc6.c
drm/i915/gt: Select the deepest available parking mode for rc6
2020-03-26 10:21:30 -07:00
selftest_rc6.h
…
selftest_reset.c
drm/i915/guc: Kill USES_GUC_SUBMISSION macro
2020-02-20 17:48:03 +00:00
selftest_ring_submission.c
drm/i915/gt: Wait for the wa batch to be pinned
2020-03-07 17:10:35 +00:00
selftest_timeline.c
drm/i915/selftests: Remove erroneous intel_engine_pm_put
2020-02-09 13:47:26 +00:00
selftest_workarounds.c
drm/i915/selftests: Also wait for the scratch buffer to be bound
2020-01-31 15:10:02 +00:00
sysfs_engines.c
drm/i915/gt: Expose heartbeat interval via sysfs
2020-02-28 22:03:49 +00:00
sysfs_engines.h
drm/i915/gt: Expose engine properties via sysfs
2020-02-28 22:03:19 +00:00