c37e2d29f0
Problem: After GPU reset pflip completion IRQ is disabled and hence any subsequent mode set or plane update leads to hang. Fix: Unless acrtc->otg_inst is initialized to -1 during display block initializtion then durng resume from GPU reset amdgpu_irq_gpu_reset_resume_helper will override CRTC 0 pflip IRQ value with whatever value was on every other unused CRTC because dm_irq_state will do irq_source = dal_irq_type + acrtc->otg_inst where acrtc->otg_inst will be 0 for every unused CRTC. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| amdgpu_dm_color.c | ||
| amdgpu_dm_crc.c | ||
| amdgpu_dm_debugfs.c | ||
| amdgpu_dm_debugfs.h | ||
| amdgpu_dm_helpers.c | ||
| amdgpu_dm_irq.c | ||
| amdgpu_dm_irq.h | ||
| amdgpu_dm_mst_types.c | ||
| amdgpu_dm_mst_types.h | ||
| amdgpu_dm_pp_smu.c | ||
| amdgpu_dm_services.c | ||
| amdgpu_dm.c | ||
| amdgpu_dm.h | ||
| Makefile | ||