linux/drivers/gpu/drm/amd/display
Aidan Wood c2ad17c3b2 drm/amd/display: Properly set DCF clock
[Why]
If num_states == 0 we did update_bound_box which doesn't updated any max
clocks if num_states == 0, therefore we need to do cap_soc_clocks
instead, also SMU cannot set DCF clock to a higher than or equal to freq
than SOC clock

[How]
Add a num_states != 0 check for update_bounding_box to be run, and after
we run get_maximum_sustainable_clocks we now check if the reported max
value of DCF is higher than SOC and if necessary set it to 1000
(becomes 1 after division by 1000) lower than SOC

Signed-off-by: Aidan Wood <Aidan.Wood@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-06-22 09:34:08 -05:00
..
amdgpu_dm drm/amd/display: disable dcn20 abm feature for bring up 2019-06-22 09:34:08 -05:00
dc drm/amd/display: Properly set DCF clock 2019-06-22 09:34:08 -05:00
include drm/amd/display: Add DSC support for Navi (v2) 2019-06-22 09:34:07 -05:00
modules drm/amd/display: Add a flags union for 3dlut transformation matrix 2019-06-22 09:34:08 -05:00
Kconfig drm/amd/display: enable DSC support by default 2019-06-22 09:34:08 -05:00
Makefile drm/amd/display: move clk_mgr files to right place 2019-05-31 10:39:31 -05:00
TODO drm/amd/display: Convert remaining loggers off dc_logger 2018-07-13 14:48:42 -05:00