Hugo Hu 3d5cc27231 drm/amd/display: Programming correct VRR_EN bit in VTEM structure ...

[Why]
In HDMI plugfest, MTK report our EMP with VRR_EN bit = 0.
VRR_EN bit is EMP-MD0-bit 0. Currently driver set 1 to bit 3.

[How]
Programming correct VRR_EN bit in EMP-MD0-bit0.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Reza Amini <Reza.Amini@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2019-03-20 23:39:48 -05:00

..

freesync.c

drm/amd/display: Programming correct VRR_EN bit in VTEM structure

2019-03-20 23:39:48 -05:00

Makefile

drm/amdgpu: add license to Makefiles

2017-12-04 11:47:55 -05:00