Hugo Hu 3d5cc27231 drm/amd/display: Programming correct VRR_EN bit in VTEM structure ... [Why] In HDMI plugfest, MTK report our EMP with VRR_EN bit = 0. VRR_EN bit is EMP-MD0-bit 0. Currently driver set 1 to bit 3. [How] Programming correct VRR_EN bit in EMP-MD0-bit0. Signed-off-by: Hugo Hu <hugo.hu@amd.com> Reviewed-by: Reza Amini <Reza.Amini@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-03-20 23:39:48 -05:00
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color	drm/amd/display: Re-add custom degamma support	2019-03-19 15:04:03 -05:00
freesync	drm/amd/display: Programming correct VRR_EN bit in VTEM structure	2019-03-20 23:39:48 -05:00
inc	drm/amd/display: Pass app_tf by value rather than by reference	2019-02-27 22:23:55 -05:00
info_packet	drm/amd/display: Info frame cleanup	2018-11-30 12:02:28 -05:00
power	drm/amd/display: reduce abm min reduction, deviation gain and contrast factor	2019-03-19 15:36:49 -05:00
stats	drm/amd/display: remove redundant null pointer check before kfree	2018-09-26 21:09:12 -05:00