Files
linux/tools/perf/arch/x86/util/topdown.c
Zhengjun Xing 9a0b36266f perf stat: Add topdown metrics in the default perf stat on the hybrid machine
Topdown metrics are missed in the default perf stat on the hybrid machine,
add Topdown metrics in default perf stat for hybrid systems.

Currently, we support the perf metrics Topdown for the p-core PMU in the
perf stat default, the perf metrics Topdown support for e-core PMU will be
implemented later separately. Refactor the code adds two x86 specific
functions. Widen the size of the event name column by 7 chars, so that all
metrics after the "#" become aligned again.

The perf metrics topdown feature is supported on the cpu_core of ADL. The
dedicated perf metrics counter and the fixed counter 3 are used for the
topdown events. Adding the topdown metrics doesn't trigger multiplexing.

Before:

 # ./perf  stat  -a true

 Performance counter stats for 'system wide':

             53.70 msec cpu-clock                 #   25.736 CPUs utilized
                80      context-switches          #    1.490 K/sec
                24      cpu-migrations            #  446.951 /sec
                52      page-faults               #  968.394 /sec
         2,788,555      cpu_core/cycles/          #   51.931 M/sec
           851,129      cpu_atom/cycles/          #   15.851 M/sec
         2,974,030      cpu_core/instructions/    #   55.385 M/sec
           416,919      cpu_atom/instructions/    #    7.764 M/sec
           586,136      cpu_core/branches/        #   10.916 M/sec
            79,872      cpu_atom/branches/        #    1.487 M/sec
            14,220      cpu_core/branch-misses/   #  264.819 K/sec
             7,691      cpu_atom/branch-misses/   #  143.229 K/sec

       0.002086438 seconds time elapsed

After:

 # ./perf stat  -a true

 Performance counter stats for 'system wide':

             61.39 msec cpu-clock                        #   24.874 CPUs utilized
                76      context-switches                 #    1.238 K/sec
                24      cpu-migrations                   #  390.968 /sec
                52      page-faults                      #  847.097 /sec
         2,753,695      cpu_core/cycles/                 #   44.859 M/sec
           903,899      cpu_atom/cycles/                 #   14.725 M/sec
         2,927,529      cpu_core/instructions/           #   47.690 M/sec
           428,498      cpu_atom/instructions/           #    6.980 M/sec
           581,299      cpu_core/branches/               #    9.470 M/sec
            83,409      cpu_atom/branches/               #    1.359 M/sec
            13,641      cpu_core/branch-misses/          #  222.216 K/sec
             8,008      cpu_atom/branch-misses/          #  130.453 K/sec
        14,761,308      cpu_core/slots/                  #  240.466 M/sec
         3,288,625      cpu_core/topdown-retiring/       #     22.3% retiring
         1,323,323      cpu_core/topdown-bad-spec/       #      9.0% bad speculation
         5,477,470      cpu_core/topdown-fe-bound/       #     37.1% frontend bound
         4,679,199      cpu_core/topdown-be-bound/       #     31.7% backend bound
           646,194      cpu_core/topdown-heavy-ops/      #      4.4% heavy operations       #     17.9% light operations
         1,244,999      cpu_core/topdown-br-mispredict/  #      8.4% branch mispredict      #      0.5% machine clears
         3,891,800      cpu_core/topdown-fetch-lat/      #     26.4% fetch latency          #     10.7% fetch bandwidth
         1,879,034      cpu_core/topdown-mem-bound/      #     12.7% memory bound           #     19.0% Core bound

       0.002467839 seconds time elapsed

Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Acked-by: Ian Rogers <irogers@google.com>
Acked-by: Namhyung Kim <namhyung@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: https://lore.kernel.org/r/20220721065706.2886112-6-zhengjun.xing@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2022-07-29 13:43:34 -03:00

127 lines
3.3 KiB
C

// SPDX-License-Identifier: GPL-2.0
#include <stdio.h>
#include "api/fs/fs.h"
#include "util/pmu.h"
#include "util/topdown.h"
#include "util/evlist.h"
#include "util/debug.h"
#include "util/pmu-hybrid.h"
#include "topdown.h"
#include "evsel.h"
#define TOPDOWN_L1_EVENTS "{slots,topdown-retiring,topdown-bad-spec,topdown-fe-bound,topdown-be-bound}"
#define TOPDOWN_L1_EVENTS_CORE "{slots,cpu_core/topdown-retiring/,cpu_core/topdown-bad-spec/,cpu_core/topdown-fe-bound/,cpu_core/topdown-be-bound/}"
#define TOPDOWN_L2_EVENTS "{slots,topdown-retiring,topdown-bad-spec,topdown-fe-bound,topdown-be-bound,topdown-heavy-ops,topdown-br-mispredict,topdown-fetch-lat,topdown-mem-bound}"
#define TOPDOWN_L2_EVENTS_CORE "{slots,cpu_core/topdown-retiring/,cpu_core/topdown-bad-spec/,cpu_core/topdown-fe-bound/,cpu_core/topdown-be-bound/,cpu_core/topdown-heavy-ops/,cpu_core/topdown-br-mispredict/,cpu_core/topdown-fetch-lat/,cpu_core/topdown-mem-bound/}"
/* Check whether there is a PMU which supports the perf metrics. */
bool topdown_sys_has_perf_metrics(void)
{
static bool has_perf_metrics;
static bool cached;
struct perf_pmu *pmu;
if (cached)
return has_perf_metrics;
/*
* The perf metrics feature is a core PMU feature.
* The PERF_TYPE_RAW type is the type of a core PMU.
* The slots event is only available when the core PMU
* supports the perf metrics feature.
*/
pmu = perf_pmu__find_by_type(PERF_TYPE_RAW);
if (pmu && pmu_have_event(pmu->name, "slots"))
has_perf_metrics = true;
cached = true;
return has_perf_metrics;
}
/*
* Check whether we can use a group for top down.
* Without a group may get bad results due to multiplexing.
*/
bool arch_topdown_check_group(bool *warn)
{
int n;
if (sysctl__read_int("kernel/nmi_watchdog", &n) < 0)
return false;
if (n > 0) {
*warn = true;
return false;
}
return true;
}
void arch_topdown_group_warn(void)
{
fprintf(stderr,
"nmi_watchdog enabled with topdown. May give wrong results.\n"
"Disable with echo 0 > /proc/sys/kernel/nmi_watchdog\n");
}
#define TOPDOWN_SLOTS 0x0400
/*
* Check whether a topdown group supports sample-read.
*
* Only Topdown metric supports sample-read. The slots
* event must be the leader of the topdown group.
*/
bool arch_topdown_sample_read(struct evsel *leader)
{
if (!evsel__sys_has_perf_metrics(leader))
return false;
if (leader->core.attr.config == TOPDOWN_SLOTS)
return true;
return false;
}
const char *arch_get_topdown_pmu_name(struct evlist *evlist, bool warn)
{
const char *pmu_name;
if (!perf_pmu__has_hybrid())
return "cpu";
if (!evlist->hybrid_pmu_name) {
if (warn)
pr_warning("WARNING: default to use cpu_core topdown events\n");
evlist->hybrid_pmu_name = perf_pmu__hybrid_type_to_pmu("core");
}
pmu_name = evlist->hybrid_pmu_name;
return pmu_name;
}
int topdown_parse_events(struct evlist *evlist)
{
const char *topdown_events;
const char *pmu_name;
if (!topdown_sys_has_perf_metrics())
return 0;
pmu_name = arch_get_topdown_pmu_name(evlist, false);
if (pmu_have_event(pmu_name, "topdown-heavy-ops")) {
if (!strcmp(pmu_name, "cpu_core"))
topdown_events = TOPDOWN_L2_EVENTS_CORE;
else
topdown_events = TOPDOWN_L2_EVENTS;
} else {
if (!strcmp(pmu_name, "cpu_core"))
topdown_events = TOPDOWN_L1_EVENTS_CORE;
else
topdown_events = TOPDOWN_L1_EVENTS;
}
return parse_events(evlist, topdown_events, NULL);
}