forked from Minki/linux
75 lines
2.4 KiB
C
75 lines
2.4 KiB
C
/*
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* linux/include/asm-mips/tx4938/spi.h
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* Definitions for TX4937/TX4938 SPI
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*
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* Copyright (C) 2000-2001 Toshiba Corporation
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*
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
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*/
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#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
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#define __ASM_TX_BOARDS_TX4938_SPI_H
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/* SPI */
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struct spi_dev_desc {
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unsigned int baud;
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unsigned short tcss, tcsh, tcsr; /* CS setup/hold/recovery time */
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unsigned int byteorder:1; /* 0:LSB-First, 1:MSB-First */
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unsigned int polarity:1; /* 0:High-Active */
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unsigned int phase:1; /* 0:Sample-Then-Shift */
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};
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extern void txx9_spi_init(unsigned long base, int (*cs_func)(int chipid, int on)) __init;
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extern void txx9_spi_irqinit(int irc_irq) __init;
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extern int txx9_spi_io(int chipid, struct spi_dev_desc *desc,
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unsigned char **inbufs, unsigned int *incounts,
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unsigned char **outbufs, unsigned int *outcounts,
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int cansleep);
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extern int spi_eeprom_write_enable(int chipid, int enable);
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extern int spi_eeprom_read_status(int chipid);
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extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
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extern int spi_eeprom_write(int chipid, int address, unsigned char *buf, int len);
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extern void spi_eeprom_proc_create(struct proc_dir_entry *dir, int chipid) __init;
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#define TXX9_IMCLK (txx9_gbus_clock / 2)
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/*
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* SPI
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*/
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/* SPMCR : SPI Master Control */
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#define TXx9_SPMCR_OPMODE 0xc0
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#define TXx9_SPMCR_CONFIG 0x40
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#define TXx9_SPMCR_ACTIVE 0x80
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#define TXx9_SPMCR_SPSTP 0x02
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#define TXx9_SPMCR_BCLR 0x01
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/* SPCR0 : SPI Status */
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#define TXx9_SPCR0_TXIFL_MASK 0xc000
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#define TXx9_SPCR0_RXIFL_MASK 0x3000
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#define TXx9_SPCR0_SIDIE 0x0800
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#define TXx9_SPCR0_SOEIE 0x0400
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#define TXx9_SPCR0_RBSIE 0x0200
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#define TXx9_SPCR0_TBSIE 0x0100
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#define TXx9_SPCR0_IFSPSE 0x0010
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#define TXx9_SPCR0_SBOS 0x0004
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#define TXx9_SPCR0_SPHA 0x0002
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#define TXx9_SPCR0_SPOL 0x0001
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/* SPSR : SPI Status */
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#define TXx9_SPSR_TBSI 0x8000
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#define TXx9_SPSR_RBSI 0x4000
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#define TXx9_SPSR_TBS_MASK 0x3800
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#define TXx9_SPSR_RBS_MASK 0x0700
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#define TXx9_SPSR_SPOE 0x0080
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#define TXx9_SPSR_IFSD 0x0008
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#define TXx9_SPSR_SIDLE 0x0004
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#define TXx9_SPSR_STRDY 0x0002
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#define TXx9_SPSR_SRRDY 0x0001
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#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
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