509 lines
15 KiB
C
509 lines
15 KiB
C
/*
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* Copyright 2005 Stephane Marchesin
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* Copyright 2008 Stuart Bennett
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/swab.h>
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#include <linux/slab.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_sarea.h"
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#include "drm_crtc_helper.h"
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#include <linux/vgaarb.h>
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#include <linux/vga_switcheroo.h>
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#include "nouveau_drv.h"
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#include <nouveau_drm.h>
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#include "nouveau_fbcon.h"
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#include "nouveau_pm.h"
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#include "nv04_display.h"
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#include "nv50_display.h"
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#include "nouveau_acpi.h"
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static void nouveau_stub_takedown(struct drm_device *dev) {}
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static int nouveau_stub_init(struct drm_device *dev) { return 0; }
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static int nouveau_init_engine_ptrs(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_engine *engine = &dev_priv->engine;
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switch (dev_priv->chipset & 0xf0) {
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case 0x00:
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engine->display.early_init = nv04_display_early_init;
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engine->display.late_takedown = nv04_display_late_takedown;
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engine->display.create = nv04_display_create;
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engine->display.destroy = nv04_display_destroy;
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engine->display.init = nv04_display_init;
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engine->display.fini = nv04_display_fini;
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engine->pm.clocks_get = nv04_pm_clocks_get;
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engine->pm.clocks_pre = nv04_pm_clocks_pre;
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engine->pm.clocks_set = nv04_pm_clocks_set;
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break;
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case 0x10:
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engine->display.early_init = nv04_display_early_init;
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engine->display.late_takedown = nv04_display_late_takedown;
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engine->display.create = nv04_display_create;
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engine->display.destroy = nv04_display_destroy;
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engine->display.init = nv04_display_init;
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engine->display.fini = nv04_display_fini;
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engine->pm.clocks_get = nv04_pm_clocks_get;
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engine->pm.clocks_pre = nv04_pm_clocks_pre;
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engine->pm.clocks_set = nv04_pm_clocks_set;
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break;
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case 0x20:
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engine->display.early_init = nv04_display_early_init;
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engine->display.late_takedown = nv04_display_late_takedown;
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engine->display.create = nv04_display_create;
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engine->display.destroy = nv04_display_destroy;
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engine->display.init = nv04_display_init;
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engine->display.fini = nv04_display_fini;
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engine->pm.clocks_get = nv04_pm_clocks_get;
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engine->pm.clocks_pre = nv04_pm_clocks_pre;
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engine->pm.clocks_set = nv04_pm_clocks_set;
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break;
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case 0x30:
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engine->display.early_init = nv04_display_early_init;
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engine->display.late_takedown = nv04_display_late_takedown;
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engine->display.create = nv04_display_create;
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engine->display.destroy = nv04_display_destroy;
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engine->display.init = nv04_display_init;
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engine->display.fini = nv04_display_fini;
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engine->pm.clocks_get = nv04_pm_clocks_get;
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engine->pm.clocks_pre = nv04_pm_clocks_pre;
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engine->pm.clocks_set = nv04_pm_clocks_set;
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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break;
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case 0x40:
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case 0x60:
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engine->display.early_init = nv04_display_early_init;
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engine->display.late_takedown = nv04_display_late_takedown;
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engine->display.create = nv04_display_create;
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engine->display.destroy = nv04_display_destroy;
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engine->display.init = nv04_display_init;
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engine->display.fini = nv04_display_fini;
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engine->pm.clocks_get = nv40_pm_clocks_get;
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engine->pm.clocks_pre = nv40_pm_clocks_pre;
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engine->pm.clocks_set = nv40_pm_clocks_set;
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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engine->pm.temp_get = nv40_temp_get;
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engine->pm.pwm_get = nv40_pm_pwm_get;
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engine->pm.pwm_set = nv40_pm_pwm_set;
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break;
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case 0x50:
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case 0x80: /* gotta love NVIDIA's consistency.. */
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case 0x90:
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case 0xa0:
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engine->display.early_init = nv50_display_early_init;
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engine->display.late_takedown = nv50_display_late_takedown;
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engine->display.create = nv50_display_create;
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engine->display.destroy = nv50_display_destroy;
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engine->display.init = nv50_display_init;
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engine->display.fini = nv50_display_fini;
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switch (dev_priv->chipset) {
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case 0x84:
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case 0x86:
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case 0x92:
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case 0x94:
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case 0x96:
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case 0x98:
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case 0xa0:
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case 0xaa:
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case 0xac:
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case 0x50:
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engine->pm.clocks_get = nv50_pm_clocks_get;
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engine->pm.clocks_pre = nv50_pm_clocks_pre;
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engine->pm.clocks_set = nv50_pm_clocks_set;
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break;
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default:
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engine->pm.clocks_get = nva3_pm_clocks_get;
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engine->pm.clocks_pre = nva3_pm_clocks_pre;
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engine->pm.clocks_set = nva3_pm_clocks_set;
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break;
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}
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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if (dev_priv->chipset >= 0x84)
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engine->pm.temp_get = nv84_temp_get;
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else
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engine->pm.temp_get = nv40_temp_get;
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engine->pm.pwm_get = nv50_pm_pwm_get;
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engine->pm.pwm_set = nv50_pm_pwm_set;
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break;
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case 0xc0:
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engine->display.early_init = nv50_display_early_init;
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engine->display.late_takedown = nv50_display_late_takedown;
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engine->display.create = nv50_display_create;
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engine->display.destroy = nv50_display_destroy;
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engine->display.init = nv50_display_init;
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engine->display.fini = nv50_display_fini;
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engine->pm.temp_get = nv84_temp_get;
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engine->pm.clocks_get = nvc0_pm_clocks_get;
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engine->pm.clocks_pre = nvc0_pm_clocks_pre;
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engine->pm.clocks_set = nvc0_pm_clocks_set;
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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engine->pm.pwm_get = nv50_pm_pwm_get;
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engine->pm.pwm_set = nv50_pm_pwm_set;
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break;
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case 0xd0:
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engine->display.early_init = nouveau_stub_init;
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engine->display.late_takedown = nouveau_stub_takedown;
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engine->display.create = nvd0_display_create;
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engine->display.destroy = nvd0_display_destroy;
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engine->display.init = nvd0_display_init;
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engine->display.fini = nvd0_display_fini;
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engine->pm.temp_get = nv84_temp_get;
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engine->pm.clocks_get = nvc0_pm_clocks_get;
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engine->pm.clocks_pre = nvc0_pm_clocks_pre;
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engine->pm.clocks_set = nvc0_pm_clocks_set;
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engine->pm.voltage_get = nouveau_voltage_gpio_get;
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engine->pm.voltage_set = nouveau_voltage_gpio_set;
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break;
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case 0xe0:
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engine->display.early_init = nouveau_stub_init;
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engine->display.late_takedown = nouveau_stub_takedown;
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engine->display.create = nvd0_display_create;
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engine->display.destroy = nvd0_display_destroy;
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engine->display.init = nvd0_display_init;
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engine->display.fini = nvd0_display_fini;
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break;
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default:
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NV_ERROR(dev, "NV%02x unsupported\n", dev_priv->chipset);
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return 1;
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}
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/* headless mode */
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if (nouveau_modeset == 2) {
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engine->display.early_init = nouveau_stub_init;
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engine->display.late_takedown = nouveau_stub_takedown;
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engine->display.create = nouveau_stub_init;
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engine->display.init = nouveau_stub_init;
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engine->display.destroy = nouveau_stub_takedown;
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}
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return 0;
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}
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static unsigned int
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nouveau_vga_set_decode(void *priv, bool state)
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{
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struct drm_device *dev = priv;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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if (dev_priv->chipset >= 0x40)
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nv_wr32(dev, 0x88054, state);
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else
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nv_wr32(dev, 0x1854, state);
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if (state)
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return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
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VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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else
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return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
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}
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static void nouveau_switcheroo_set_state(struct pci_dev *pdev,
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enum vga_switcheroo_state state)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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pm_message_t pmm = { .event = PM_EVENT_SUSPEND };
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if (state == VGA_SWITCHEROO_ON) {
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printk(KERN_ERR "VGA switcheroo: switched nouveau on\n");
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dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
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nouveau_pci_resume(pdev);
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drm_kms_helper_poll_enable(dev);
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dev->switch_power_state = DRM_SWITCH_POWER_ON;
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} else {
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printk(KERN_ERR "VGA switcheroo: switched nouveau off\n");
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dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
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drm_kms_helper_poll_disable(dev);
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nouveau_switcheroo_optimus_dsm();
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nouveau_pci_suspend(pdev, pmm);
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dev->switch_power_state = DRM_SWITCH_POWER_OFF;
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}
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}
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static void nouveau_switcheroo_reprobe(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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nouveau_fbcon_output_poll_changed(dev);
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}
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static bool nouveau_switcheroo_can_switch(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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bool can_switch;
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spin_lock(&dev->count_lock);
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can_switch = (dev->open_count == 0);
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spin_unlock(&dev->count_lock);
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return can_switch;
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}
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static const struct vga_switcheroo_client_ops nouveau_switcheroo_ops = {
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.set_gpu_state = nouveau_switcheroo_set_state,
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.reprobe = nouveau_switcheroo_reprobe,
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.can_switch = nouveau_switcheroo_can_switch,
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};
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int
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nouveau_card_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_engine *engine;
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int ret;
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vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode);
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vga_switcheroo_register_client(dev->pdev, &nouveau_switcheroo_ops);
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/* Initialise internal driver API hooks */
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ret = nouveau_init_engine_ptrs(dev);
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if (ret)
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goto out;
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engine = &dev_priv->engine;
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spin_lock_init(&dev_priv->context_switch_lock);
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/* Make the CRTCs and I2C buses accessible */
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ret = engine->display.early_init(dev);
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if (ret)
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goto out;
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/* Parse BIOS tables / Run init tables if card not POSTed */
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ret = nouveau_bios_init(dev);
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if (ret)
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goto out_display_early;
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/* workaround an odd issue on nvc1 by disabling the device's
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* nosnoop capability. hopefully won't cause issues until a
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* better fix is found - assuming there is one...
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*/
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if (dev_priv->chipset == 0xc1) {
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nv_mask(dev, 0x00088080, 0x00000800, 0x00000000);
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}
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ret = nouveau_irq_init(dev);
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if (ret)
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goto out_bios;
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ret = nouveau_display_create(dev);
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if (ret)
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goto out_irq;
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nouveau_backlight_init(dev);
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nouveau_pm_init(dev);
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if (dev->mode_config.num_crtc) {
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ret = nouveau_display_init(dev);
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if (ret)
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goto out_pm;
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}
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return 0;
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out_pm:
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nouveau_pm_fini(dev);
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nouveau_backlight_exit(dev);
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nouveau_display_destroy(dev);
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out_irq:
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nouveau_irq_fini(dev);
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out_bios:
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nouveau_bios_takedown(dev);
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out_display_early:
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engine->display.late_takedown(dev);
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out:
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vga_switcheroo_unregister_client(dev->pdev);
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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return ret;
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}
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static void nouveau_card_takedown(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_engine *engine = &dev_priv->engine;
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if (dev->mode_config.num_crtc)
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nouveau_display_fini(dev);
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nouveau_pm_fini(dev);
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nouveau_backlight_exit(dev);
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nouveau_display_destroy(dev);
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nouveau_bios_takedown(dev);
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engine->display.late_takedown(dev);
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nouveau_irq_fini(dev);
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vga_switcheroo_unregister_client(dev->pdev);
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vga_client_register(dev->pdev, NULL, NULL, NULL);
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}
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/* first module load, setup the mmio/fb mapping */
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/* KMS: we need mmio at load time, not when the first drm client opens. */
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int nouveau_firstopen(struct drm_device *dev)
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{
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return 0;
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}
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/* if we have an OF card, copy vbios to RAMIN */
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static void nouveau_OF_copy_vbios_to_ramin(struct drm_device *dev)
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{
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#if defined(__powerpc__)
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int size, i;
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const uint32_t *bios;
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struct device_node *dn = pci_device_to_OF_node(dev->pdev);
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if (!dn) {
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NV_INFO(dev, "Unable to get the OF node\n");
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return;
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}
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bios = of_get_property(dn, "NVDA,BMP", &size);
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if (bios) {
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for (i = 0; i < size; i += 4)
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nv_wi32(dev, i, bios[i/4]);
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NV_INFO(dev, "OF bios successfully copied (%d bytes)\n", size);
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} else {
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NV_INFO(dev, "Unable to get the OF bios\n");
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}
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#endif
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}
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int nouveau_load(struct drm_device *dev, unsigned long flags)
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{
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struct drm_nouveau_private *dev_priv;
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uint32_t reg0 = ~0, strap;
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int ret;
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dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
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if (!dev_priv) {
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ret = -ENOMEM;
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goto err_out;
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}
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dev_priv->newpriv = dev->dev_private;
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dev->dev_private = dev_priv;
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dev_priv->dev = dev;
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NV_DEBUG(dev, "vendor: 0x%X device: 0x%X class: 0x%X\n",
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dev->pci_vendor, dev->pci_device, dev->pdev->class);
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/* determine chipset and derive architecture from it */
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reg0 = nv_rd32(dev, NV03_PMC_BOOT_0);
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if ((reg0 & 0x0f000000) > 0) {
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dev_priv->chipset = (reg0 & 0xff00000) >> 20;
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switch (dev_priv->chipset & 0xf0) {
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case 0x10:
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case 0x20:
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case 0x30:
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dev_priv->card_type = dev_priv->chipset & 0xf0;
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break;
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case 0x40:
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case 0x60:
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dev_priv->card_type = NV_40;
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break;
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case 0x50:
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case 0x80:
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case 0x90:
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case 0xa0:
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dev_priv->card_type = NV_50;
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break;
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case 0xc0:
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dev_priv->card_type = NV_C0;
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break;
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case 0xd0:
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dev_priv->card_type = NV_D0;
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break;
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case 0xe0:
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dev_priv->card_type = NV_E0;
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break;
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default:
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break;
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}
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} else
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if ((reg0 & 0xff00fff0) == 0x20004000) {
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if (reg0 & 0x00f00000)
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dev_priv->chipset = 0x05;
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else
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dev_priv->chipset = 0x04;
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dev_priv->card_type = NV_04;
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}
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if (!dev_priv->card_type) {
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|
NV_ERROR(dev, "unsupported chipset 0x%08x\n", reg0);
|
|
ret = -EINVAL;
|
|
goto err_priv;
|
|
}
|
|
|
|
NV_INFO(dev, "Detected an NV%02x generation card (0x%08x)\n",
|
|
dev_priv->card_type, reg0);
|
|
|
|
/* determine frequency of timing crystal */
|
|
strap = nv_rd32(dev, 0x101000);
|
|
if ( dev_priv->chipset < 0x17 ||
|
|
(dev_priv->chipset >= 0x20 && dev_priv->chipset <= 0x25))
|
|
strap &= 0x00000040;
|
|
else
|
|
strap &= 0x00400040;
|
|
|
|
switch (strap) {
|
|
case 0x00000000: dev_priv->crystal = 13500; break;
|
|
case 0x00000040: dev_priv->crystal = 14318; break;
|
|
case 0x00400000: dev_priv->crystal = 27000; break;
|
|
case 0x00400040: dev_priv->crystal = 25000; break;
|
|
}
|
|
|
|
NV_DEBUG(dev, "crystal freq: %dKHz\n", dev_priv->crystal);
|
|
|
|
nouveau_OF_copy_vbios_to_ramin(dev);
|
|
|
|
/* For kernel modesetting, init card now and bring up fbcon */
|
|
ret = nouveau_card_init(dev);
|
|
if (ret)
|
|
goto err_priv;
|
|
|
|
return 0;
|
|
|
|
err_priv:
|
|
dev->dev_private = dev_priv->newpriv;
|
|
kfree(dev_priv);
|
|
err_out:
|
|
return ret;
|
|
}
|
|
|
|
void nouveau_lastclose(struct drm_device *dev)
|
|
{
|
|
vga_switcheroo_process_delayed_switch();
|
|
}
|
|
|
|
int nouveau_unload(struct drm_device *dev)
|
|
{
|
|
struct drm_nouveau_private *dev_priv = dev->dev_private;
|
|
|
|
nouveau_card_takedown(dev);
|
|
|
|
dev->dev_private = dev_priv->newpriv;
|
|
kfree(dev_priv);
|
|
return 0;
|
|
}
|