linux/drivers/gpu/drm/msm
Jordan Crouse bf5af4ae87 drm/msm: Hard code the GPU "slow frequency"
Some A3XX and A4XX GPU targets required that the GPU clock be
programmed to a non zero value when it was disabled so
27Mhz was chosen as the "invalid" frequency.

Even though newer targets do not have the same clock restrictions
we still write 27Mhz on clock disable and expect the clock subsystem
to round down to zero.

For unknown reasons even though the slow clock speed is always
27Mhz and it isn't actually a functional level the legacy device tree
frequency tables always defined it and then did gymnastics to work
around it.

Instead of playing the same silly games just hard code the "slow" clock
speed in the code as 27MHz and save ourselves a bit of infrastructure.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-04-08 06:59:37 -04:00
..
adreno drm/msm: Hard code the GPU "slow frequency" 2017-04-08 06:59:37 -04:00
dsi drm/msm/dsi: Fix bug in dsi_mgr_phy_enable 2017-04-08 06:59:32 -04:00
edp drm: bridge: Link encoder and bridge in core code 2016-12-18 16:31:45 +05:30
hdmi drm/msm/hdmi: redefinitions of macros not required 2017-04-08 06:59:33 -04:00
mdp drm/msm: Reference count address spaces 2017-04-08 06:59:36 -04:00
Kconfig drm/msm/dsi: Add PHY/PLL for 8x96 2017-02-06 11:28:45 -05:00
Makefile drm/msm/mdp5: Add structs for hw Layer Mixers 2017-04-08 06:59:33 -04:00
msm_atomic.c drm/msm/mdp5: Add cursor planes 2017-02-06 11:28:44 -05:00
msm_debugfs.c drm/msm/gpu: use pm-runtime 2017-04-08 06:59:31 -04:00
msm_debugfs.h drm/msm: Remove msm_debugfs_cleanup() 2017-03-08 11:24:45 +01:00
msm_drv.c drm/msm: Don't increase priv->num_aspaces until we know that it fits 2017-04-08 06:59:32 -04:00
msm_drv.h drm/msm: Reference count address spaces 2017-04-08 06:59:36 -04:00
msm_fb.c drm: Nuke fb->pixel_format 2016-12-15 14:55:34 +02:00
msm_fbdev.c drm/fb-helper: Automatically clean up fb_info 2017-02-07 21:36:28 +01:00
msm_fence.c dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_fence.h dma-buf: Rename struct fence to dma_fence 2016-10-25 14:40:39 +02:00
msm_gem_prime.c drm/msm: change gem->vmap() to get/put 2016-07-16 10:09:07 -04:00
msm_gem_shrinker.c Merge branch 'linus' into locking/core, to pick up fixes 2016-11-22 12:37:38 +01:00
msm_gem_submit.c drm/msm: move submit fence wait out of struct_mutex 2017-04-08 06:59:31 -04:00
msm_gem_vma.c drm/msm: Reference count address spaces 2017-04-08 06:59:36 -04:00
msm_gem.c drm/msm: Don't allow zero sized buffer objects 2017-04-08 06:59:32 -04:00
msm_gem.h drm/msm: Reference count address spaces 2017-04-08 06:59:36 -04:00
msm_gpu.c drm/msm: Hard code the GPU "slow frequency" 2017-04-08 06:59:37 -04:00
msm_gpu.h drm/msm: Hard code the GPU "slow frequency" 2017-04-08 06:59:37 -04:00
msm_iommu.c drm/msm: pm runtime support for iommu 2017-04-08 06:59:31 -04:00
msm_kms.h drm/msm: Remove msm_debugfs_cleanup() 2017-03-08 11:24:45 +01:00
msm_mmu.h drm/msm: let gpu wire up it's own fault handler 2017-02-06 11:28:42 -05:00
msm_perf.c drm/msm: Remove msm_debugfs_cleanup() 2017-03-08 11:24:45 +01:00
msm_rd.c drm/msm: Support 64 bit iova in RD_CMDSTREAM_ADDR 2017-04-08 06:59:32 -04:00
msm_ringbuffer.c drm/msm: Ensure that the hardware write pointer is valid 2016-12-29 15:02:58 -05:00
msm_ringbuffer.h
NOTES