forked from Minki/linux
bc71c0961c
This adds support for the U9540 variant of the U8500 series. This is an application processor without internal modem. This is the most basic part with ASIC ID, CPU-related fixes, IRQ list, register ranges, timer, UART, and L2 cache setup. This is based on a patch by Michel Jaouen which was rewritten to fit with the latest 3.3 kernel. ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to migrate to using Device Tree for getting the IRQs to devices. ChangeLog v2->v3: introduced a fixed virtual offset for the ROM as suggested by Arnd Bergmann. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
93 lines
2.5 KiB
C
93 lines
2.5 KiB
C
/*
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* Copyright (C) ST-Ericsson SA 2011
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*
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* License Terms: GNU General Public License v2
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* Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
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*/
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/clksrc-dbx500-prcmu.h>
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#include <linux/of.h>
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#include <asm/smp_twd.h>
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#include <plat/mtu.h>
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#include <mach/setup.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#ifdef CONFIG_HAVE_ARM_TWD
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static DEFINE_TWD_LOCAL_TIMER(u5500_twd_local_timer,
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U5500_TWD_BASE, IRQ_LOCALTIMER);
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static DEFINE_TWD_LOCAL_TIMER(u8500_twd_local_timer,
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U8500_TWD_BASE, IRQ_LOCALTIMER);
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static void __init ux500_twd_init(void)
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{
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struct twd_local_timer *twd_local_timer;
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int err;
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twd_local_timer = cpu_is_u5500() ? &u5500_twd_local_timer :
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&u8500_twd_local_timer;
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if (of_have_populated_dt())
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twd_local_timer_of_register();
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else {
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err = twd_local_timer_register(twd_local_timer);
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if (err)
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pr_err("twd_local_timer_register failed %d\n", err);
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}
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}
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#else
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#define ux500_twd_init() do { } while(0)
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#endif
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static void __init ux500_timer_init(void)
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{
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void __iomem *mtu_timer_base;
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void __iomem *prcmu_timer_base;
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if (cpu_is_u5500()) {
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mtu_timer_base = __io_address(U5500_MTU0_BASE);
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prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
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} else if (cpu_is_u8500_family()) {
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mtu_timer_base = __io_address(U8500_MTU0_BASE);
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prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
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} else {
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ux500_unknown_soc();
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}
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/*
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* Here we register the timerblocks active in the system.
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* Localtimers (twd) is started when both cpu is up and running.
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* MTU register a clocksource, clockevent and sched_clock.
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* Since the MTU is located in the VAPE power domain
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* it will be cleared in sleep which makes it unsuitable.
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* We however need it as a timer tick (clockevent)
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* during boot to calibrate delay until twd is started.
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* RTC-RTT have problems as timer tick during boot since it is
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* depending on delay which is not yet calibrated. RTC-RTT is in the
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* always-on powerdomain and is used as clockevent instead of twd when
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* sleeping.
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* The PRCMU timer 4(3 for DB5500) register a clocksource and
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* sched_clock with higher rating then MTU since is always-on.
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*
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*/
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nmdk_timer_init(mtu_timer_base);
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clksrc_dbx500_prcmu_init(prcmu_timer_base);
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ux500_twd_init();
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}
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static void ux500_timer_reset(void)
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{
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nmdk_clkevt_reset();
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nmdk_clksrc_reset();
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}
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struct sys_timer ux500_timer = {
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.init = ux500_timer_init,
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.resume = ux500_timer_reset,
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};
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