Sonic Zhang bc6b92f8c3 Blackfin: don't attempt to flush on-chip L1 SRAM regions ... Since the on-chip L1 regions are not cacheable, there is no point in trying to flush/invalidate them. Plus, older Blackfin parts like to trigger an exception (like BF533-0.3). Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>		2011-05-25 08:13:41 -04:00
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asm	Blackfin: don't attempt to flush on-chip L1 SRAM regions	2011-05-25 08:13:41 -04:00
mach-common	Blackfin: unify pll.h headers	2011-01-10 07:18:16 -05:00