Fix word clock length which must equal to one bit clock cycle in DSP mode.
Surprisingly McBSP is able synchronize into wrong length when it's
slave but e.g. TLV320AIC33 codec in slave configuration is outputting
some amount of noise if word clock length is longer than one bit clock
cycle.
Fix also bit clock and frame sync polarities in DSP mode since they are
opposite from I2S.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Cc: Arun KS <arunks@mistralsolutions.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
ba9d0fd0f0