889fcbe949
Replaces a bunch of unnecessarily duplicated boilerplate in per-chipset code with a simpler, common, implementation. Channel "awaken" notify code is completely gone for now. KMS has never made use of it so far, and event notify handling is about to be changed in general anyway. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
209 lines
6.9 KiB
C
209 lines
6.9 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include "chan.h"
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#include "hdmi.h"
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#include "head.h"
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#include "ior.h"
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#include <subdev/timer.h>
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#include <nvif/class.h>
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static void
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gt215_sor_hda_eld(struct nvkm_ior *ior, int head, u8 *data, u8 size)
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{
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struct nvkm_device *device = ior->disp->engine.subdev.device;
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const u32 soff = ior->id * 0x800;
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int i;
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for (i = 0; i < size; i++)
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nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]);
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for (; i < 0x60; i++)
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nvkm_wr32(device, 0x61c440 + soff, (i << 8));
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nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002);
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}
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static void
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gt215_sor_hda_hpd(struct nvkm_ior *ior, int head, bool present)
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{
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struct nvkm_device *device = ior->disp->engine.subdev.device;
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u32 data = 0x80000000;
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u32 mask = 0x80000001;
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if (present)
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data |= 0x00000001;
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else
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mask |= 0x00000002;
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nvkm_mask(device, 0x61c448 + ior->id * 0x800, mask, data);
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}
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const struct nvkm_ior_func_hda
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gt215_sor_hda = {
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.hpd = gt215_sor_hda_hpd,
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.eld = gt215_sor_hda_eld,
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};
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void
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gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 soff = nv50_ior_base(sor);
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const u32 data = 0x80000000 | (0x00000001 * enable);
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const u32 mask = 0x8000000d;
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nvkm_mask(device, 0x61c1e0 + soff, mask, data);
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nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000))
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break;
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);
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}
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static const struct nvkm_ior_func_dp
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gt215_sor_dp = {
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.lanes = { 2, 1, 0, 3 },
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.links = g94_sor_dp_links,
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.power = g94_sor_dp_power,
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.pattern = g94_sor_dp_pattern,
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.drive = g94_sor_dp_drive,
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.audio = gt215_sor_dp_audio,
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.audio_sym = g94_sor_dp_audio_sym,
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.activesym = g94_sor_dp_activesym,
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.watermark = g94_sor_dp_watermark,
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};
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void
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gt215_sor_hdmi_ctrl(struct nvkm_ior *ior, int head, bool enable, u8 max_ac_packet,
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u8 rekey, u8 *avi, u8 avi_size, u8 *vendor, u8 vendor_size)
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{
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struct nvkm_device *device = ior->disp->engine.subdev.device;
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const u32 ctrl = 0x40000000 * enable |
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0x1f000000 /* ??? */ |
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max_ac_packet << 16 |
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rekey;
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const u32 soff = nv50_ior_base(ior);
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struct packed_hdmi_infoframe avi_infoframe;
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struct packed_hdmi_infoframe vendor_infoframe;
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pack_hdmi_infoframe(&avi_infoframe, avi, avi_size);
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pack_hdmi_infoframe(&vendor_infoframe, vendor, vendor_size);
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if (!(ctrl & 0x40000000)) {
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nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);
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nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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return;
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}
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/* AVI InfoFrame */
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);
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if (avi_size) {
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nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header);
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nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low);
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nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high);
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nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low);
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nvkm_wr32(device, 0x61c538 + soff, avi_infoframe.subpack1_high);
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nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);
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}
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/* Audio InfoFrame */
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);
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nvkm_wr32(device, 0x61c508 + soff, 0x000a0184);
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nvkm_wr32(device, 0x61c50c + soff, 0x00000071);
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nvkm_wr32(device, 0x61c510 + soff, 0x00000000);
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nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);
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/* Vendor InfoFrame */
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nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
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if (vendor_size) {
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nvkm_wr32(device, 0x61c544 + soff, vendor_infoframe.header);
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nvkm_wr32(device, 0x61c548 + soff, vendor_infoframe.subpack0_low);
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nvkm_wr32(device, 0x61c54c + soff, vendor_infoframe.subpack0_high);
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/* Is there a second (or up to fourth?) set of subpack registers here? */
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/* nvkm_wr32(device, 0x61c550 + soff, vendor_infoframe.subpack1_low); */
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/* nvkm_wr32(device, 0x61c554 + soff, vendor_infoframe.subpack1_high); */
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nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001);
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}
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nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
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nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
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nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
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/* ??? */
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nvkm_mask(device, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
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nvkm_mask(device, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
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nvkm_mask(device, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
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/* HDMI_CTRL */
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nvkm_mask(device, 0x61c5a4 + soff, 0x5f1f007f, ctrl);
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}
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static const struct nvkm_ior_func
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gt215_sor = {
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.state = g94_sor_state,
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.power = nv50_sor_power,
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.clock = nv50_sor_clock,
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.hdmi = {
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.ctrl = gt215_sor_hdmi_ctrl,
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},
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.dp = >215_sor_dp,
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.hda = >215_sor_hda,
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};
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static int
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gt215_sor_new(struct nvkm_disp *disp, int id)
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{
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return nvkm_ior_new_(>215_sor, disp, SOR, id, true);
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}
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static const struct nvkm_disp_func
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gt215_disp = {
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.oneinit = nv50_disp_oneinit,
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.init = nv50_disp_init,
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.fini = nv50_disp_fini,
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.intr = nv50_disp_intr,
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.super = nv50_disp_super,
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.uevent = &nv50_disp_chan_uevent,
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.head = { .cnt = nv50_head_cnt, .new = nv50_head_new },
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.dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new },
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.sor = { .cnt = g94_sor_cnt, .new = gt215_sor_new },
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.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
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.root = { 0,0,GT214_DISP },
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.user = {
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{{0,0,GT214_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
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{{0,0,GT214_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
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{{0,0,GT214_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
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{{0,0,GT214_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
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{{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly },
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{}
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},
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};
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int
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gt215_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_disp **pdisp)
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{
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return nvkm_disp_new_(>215_disp, device, type, inst, pdisp);
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}
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