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All of the sunxi SoCs since at least the A33 have a similar structure for the MBUS and DRAM controller, but they all have minor differences in MBUS port assignments and DRAM controller behavior. Give each SoC its own compatible. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20220702042447.26734-2-samuel@sholland.org