-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCAAGBQJT05voAAoJEPOmecmc0R2BI9cH/0IscqtOhxZ0vAnIxp2lf7C5 r3SHUM65T+qz3/r0fYmwSL98l64CWc75JaQoPK7LuZTou+BhR0WlsHbNJRQxWbXf u9McbRXEnvK8rmMl7KbeWrK/FhOpqiO6f1pmui9neA1WFKB4/BQgpNZNBjpn6OHO XH0JhD7k0gITVlaN9C0Ijz9zrMfZplD6hp8hX5X0a6XNzmur55IbLRkXTI8MEFUu aA5m1R49xnuUT0d8R8rScxO9a1pTafvFgawQulxTvcmEttiqKvSbxQE4/JZfOEiH sOAzeKoPt8C7wtkeO9j6hbw/z9VDOKqYN/ytMNNGpDU9b5jr+TwUqkwYvHbRkrg= =bKG6 -----END PGP SIGNATURE----- Merge tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt Merge "Initial support for Rockchip RK3288 SoCs" from Heiko Stuebner: * tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: Build dtbs for Rockchip boards ARM: dts: add rk3288 evaluation board ARM: dts: rockchip: add core rk3288 dtsi ARM: rockchip: enable support for RK3288 SoCs ARM: Kconfig: set default gpio number for rockchip SoCs ARM: rockchip: add debug uart used by rk3288 ARM: rockchip: clarify usability of DEBUG_RK3X_UART debug_ll options dt-bindings: arm: add cortex-a12 and cortex-a17 cpu compatible properties Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
---|---|---|
.. | ||
bindings | ||
00-INDEX | ||
booting-without-of.txt | ||
usage-model.txt |