Sonny Jiang b2576c3bf4 drm/amdgpu/vcn3.0: add wptr/rptr reset/update for share memory ...

Because of dpg, the rptr/wptr need to be saved on fw shared memory,
and restore them back in RBC_RB_RPTR/WPTR in kernel at power up.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2021-02-24 09:28:55 -05:00

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