Martin Blumenstingl b7d10841e5 ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt ... The INTR32 pin of the IP101GR Ethernet PHY is routed to the GPIOH_3 pad on the SoC. Enable the interrupt function of the PHY's INTR32 pin to switch it from it's default "receive error" mode to "interrupt pin" mode. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>		2019-02-11 12:52:26 -08:00
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bootp
compressed	kbuild: remove redundant target cleaning on failure	2019-01-06 09:46:51 +09:00
dts	ARM: dts: meson8b: ec100: enable the Ethernet PHY interrupt	2019-02-11 12:52:26 -08:00
.gitignore
deflate_xip_data.sh
install.sh
Makefile	kbuild: remove redundant target cleaning on failure	2019-01-06 09:46:51 +09:00