Qingqing Zhuo 7afa0033d6 drm/amd/display: Enable pflip interrupt upon pipe enable ... [Why] pflip interrupt would not be enabled promptly if a pipe is disabled and re-enabled, causing flip_done timeout error during DP compliance tests [How] Enable pflip interrupt upon pipe enablement Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-03-10 16:14:36 -05:00
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hw	drm/amd/display: Enable pflip interrupt upon pipe enable	2021-03-10 16:14:36 -05:00
bw_fixed.h
clock_source.h
compressor.h
core_status.h	drm/amd/display: fail instead of div by zero/bugcheck	2020-11-02 15:30:47 -05:00
core_types.h	drm/amd/display: enable HUBP blank behaviour	2021-01-13 23:44:28 -05:00
custom_float.h
dc_link_ddc.h	drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update	2020-07-01 01:59:26 -04:00
dc_link_dp.h	drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update	2020-07-01 01:59:26 -04:00
dce_calcs.h
dcn_calc_math.h	drm/amd/display: fixup DML dependencies	2020-01-16 14:16:48 -05:00
dcn_calcs.h	drm/amd/display: make clk mgr soc specific	2019-05-31 10:39:29 -05:00
hw_sequencer_private.h	drm/amd/display: move panel power seq to new panel struct	2020-04-22 18:11:48 -04:00
hw_sequencer.h	drm/amd/display: Dynamic cursor cache size for MALL eligibility check	2021-01-21 09:54:26 -05:00
link_hwss.h	drm/amd/display: correct eDP T9 delay	2020-11-02 15:31:10 -05:00
reg_helper.h	drm/amd/display: Indirect reg read macro with shift and mask	2020-01-16 14:13:53 -05:00
resource.h	drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)	2020-11-04 17:11:37 -05:00
vm_helper.h	drm/amd/display: move vmid determination logic to a module	2019-06-22 09:34:14 -05:00