d96575709c
The $status, $badaddr, and $cause registers belong to the thread context, so KGDB can obtain their contents from pt_regs in each trap. However, the sequential number of these registers in the gdb register list is far from the general-purpose registers. If riscv port uses the existing method to report these three registers, many trivial registers with sequence numbers in the middle of them will also be packaged to the reply packets. To solve this problem, the riscv port wants to introduce the GDB target description mechanism to customize the reported register list. By the list, the KGDB can ignore the intermediate registers and just reports the general-purpose registers and these three system registers. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
113 lines
2.5 KiB
C
113 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __ASM_KGDB_H_
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#define __ASM_KGDB_H_
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#ifdef __KERNEL__
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#define GDB_SIZEOF_REG sizeof(unsigned long)
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#define DBG_MAX_REG_NUM (36)
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#define NUMREGBYTES ((DBG_MAX_REG_NUM) * GDB_SIZEOF_REG)
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#define CACHE_FLUSH_IS_SAFE 1
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#define BUFMAX 2048
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#ifdef CONFIG_RISCV_ISA_C
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#define BREAK_INSTR_SIZE 2
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#else
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#define BREAK_INSTR_SIZE 4
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#endif
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#ifndef __ASSEMBLY__
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extern int kgdb_has_hit_break(unsigned long addr);
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extern unsigned long kgdb_compiled_break;
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static inline void arch_kgdb_breakpoint(void)
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{
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asm(".global kgdb_compiled_break\n"
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".option norvc\n"
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"kgdb_compiled_break: ebreak\n"
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".option rvc\n");
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}
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#endif /* !__ASSEMBLY__ */
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#define DBG_REG_ZERO "zero"
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#define DBG_REG_RA "ra"
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#define DBG_REG_SP "sp"
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#define DBG_REG_GP "gp"
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#define DBG_REG_TP "tp"
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#define DBG_REG_T0 "t0"
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#define DBG_REG_T1 "t1"
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#define DBG_REG_T2 "t2"
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#define DBG_REG_FP "fp"
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#define DBG_REG_S1 "s1"
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#define DBG_REG_A0 "a0"
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#define DBG_REG_A1 "a1"
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#define DBG_REG_A2 "a2"
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#define DBG_REG_A3 "a3"
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#define DBG_REG_A4 "a4"
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#define DBG_REG_A5 "a5"
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#define DBG_REG_A6 "a6"
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#define DBG_REG_A7 "a7"
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#define DBG_REG_S2 "s2"
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#define DBG_REG_S3 "s3"
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#define DBG_REG_S4 "s4"
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#define DBG_REG_S5 "s5"
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#define DBG_REG_S6 "s6"
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#define DBG_REG_S7 "s7"
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#define DBG_REG_S8 "s8"
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#define DBG_REG_S9 "s9"
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#define DBG_REG_S10 "s10"
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#define DBG_REG_S11 "s11"
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#define DBG_REG_T3 "t3"
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#define DBG_REG_T4 "t4"
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#define DBG_REG_T5 "t5"
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#define DBG_REG_T6 "t6"
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#define DBG_REG_EPC "pc"
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#define DBG_REG_STATUS "sstatus"
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#define DBG_REG_BADADDR "stval"
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#define DBG_REG_CAUSE "scause"
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#define DBG_REG_ZERO_OFF 0
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#define DBG_REG_RA_OFF 1
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#define DBG_REG_SP_OFF 2
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#define DBG_REG_GP_OFF 3
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#define DBG_REG_TP_OFF 4
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#define DBG_REG_T0_OFF 5
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#define DBG_REG_T1_OFF 6
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#define DBG_REG_T2_OFF 7
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#define DBG_REG_FP_OFF 8
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#define DBG_REG_S1_OFF 9
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#define DBG_REG_A0_OFF 10
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#define DBG_REG_A1_OFF 11
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#define DBG_REG_A2_OFF 12
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#define DBG_REG_A3_OFF 13
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#define DBG_REG_A4_OFF 14
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#define DBG_REG_A5_OFF 15
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#define DBG_REG_A6_OFF 16
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#define DBG_REG_A7_OFF 17
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#define DBG_REG_S2_OFF 18
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#define DBG_REG_S3_OFF 19
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#define DBG_REG_S4_OFF 20
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#define DBG_REG_S5_OFF 21
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#define DBG_REG_S6_OFF 22
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#define DBG_REG_S7_OFF 23
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#define DBG_REG_S8_OFF 24
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#define DBG_REG_S9_OFF 25
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#define DBG_REG_S10_OFF 26
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#define DBG_REG_S11_OFF 27
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#define DBG_REG_T3_OFF 28
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#define DBG_REG_T4_OFF 29
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#define DBG_REG_T5_OFF 30
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#define DBG_REG_T6_OFF 31
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#define DBG_REG_EPC_OFF 32
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#define DBG_REG_STATUS_OFF 33
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#define DBG_REG_BADADDR_OFF 34
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#define DBG_REG_CAUSE_OFF 35
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#include <asm/gdb_xml.h>
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#endif
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#endif
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