e3462f9e07
On some platform such as RK3328, the 480m clock may need to assign clock parent in dts in stead of clock driver. So this patch add property of assigned-clocks and assigned-clock-parents to assign parent for 480m clock. Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
71 lines
2.2 KiB
Plaintext
71 lines
2.2 KiB
Plaintext
ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
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Required properties (phy (parent) node):
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- compatible : should be one of the listed compatibles:
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* "rockchip,rk3328-usb2phy"
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* "rockchip,rk3366-usb2phy"
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* "rockchip,rk3399-usb2phy"
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- reg : the address offset of grf for usb-phy configuration.
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- #clock-cells : should be 0.
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- clock-output-names : specify the 480m output clock name.
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Optional properties:
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- clocks : phandle + phy specifier pair, for the input clock of phy.
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- clock-names : input clock name of phy, must be "phyclk".
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- assigned-clocks : phandle of usb 480m clock.
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- assigned-clock-parents : parent of usb 480m clock, select between
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usb-phy output 480m and xin24m.
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Refer to clk/clock-bindings.txt for generic clock
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consumer properties.
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Required nodes : a sub-node is required for each port the phy provides.
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The sub-node name is used to identify host or otg port,
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and shall be the following entries:
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* "otg-port" : the name of otg port.
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* "host-port" : the name of host port.
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Required properties (port (child) node):
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- #phy-cells : must be 0. See ./phy-bindings.txt for details.
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- interrupts : specify an interrupt for each entry in interrupt-names.
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- interrupt-names : a list which shall be the following entries:
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* "otg-id" : for the otg id interrupt.
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* "otg-bvalid" : for the otg vbus interrupt.
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* "linestate" : for the host/otg linestate interrupt.
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Optional properties:
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- phy-supply : phandle to a regulator that provides power to VBUS.
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See ./phy-bindings.txt for details.
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Example:
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grf: syscon@ff770000 {
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compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <1>;
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...
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u2phy: usb2-phy@700 {
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compatible = "rockchip,rk3366-usb2phy";
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reg = <0x700 0x2c>;
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#clock-cells = <0>;
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clock-output-names = "sclk_otgphy0_480m";
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u2phy_otg: otg-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "otg-id", "otg-bvalid", "linestate";
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status = "okay";
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};
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u2phy_host: host-port {
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#phy-cells = <0>;
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "linestate";
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status = "okay";
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};
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};
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};
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