forked from Minki/linux
7a10e3e407
This reaches encapsulation for this file. In order to reach this: * move priv->valid_context to iwl_shared * move the last_rejected initialization to the upper layer * define a wrapper iwl_nic_config in the upper layer that calls to cfg->lib->ops->nic_config Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
599 lines
17 KiB
C
599 lines
17 KiB
C
/******************************************************************************
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
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* USA
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* Contact Information:
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* Intel Linux Wireless <ilw@linux.intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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*****************************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include "iwl-dev.h"
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#include "iwl-core.h"
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#include "iwl-io.h"
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#include "iwl-helpers.h"
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#include "iwl-agn-hw.h"
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#include "iwl-agn.h"
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#include "iwl-agn-calib.h"
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#include "iwl-trans.h"
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#include "iwl-fh.h"
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static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
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{COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
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0, COEX_UNASSOC_IDLE_FLAGS},
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{COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
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0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
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{COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
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0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
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{COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
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0, COEX_CALIBRATION_FLAGS},
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{COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
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0, COEX_PERIODIC_CALIBRATION_FLAGS},
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{COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
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0, COEX_CONNECTION_ESTAB_FLAGS},
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{COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
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0, COEX_ASSOCIATED_IDLE_FLAGS},
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{COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
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0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
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{COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
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0, COEX_ASSOC_AUTO_SCAN_FLAGS},
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{COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
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0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
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{COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
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{COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
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{COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
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0, COEX_STAND_ALONE_DEBUG_FLAGS},
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{COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
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0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
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{COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
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{COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
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};
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/*
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* ucode
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*/
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static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
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struct fw_desc *image, u32 dst_addr)
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{
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dma_addr_t phy_addr = image->p_addr;
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u32 byte_cnt = image->len;
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int ret;
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priv->ucode_write_complete = 0;
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iwl_write_direct32(bus(priv),
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FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
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FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
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iwl_write_direct32(bus(priv),
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FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
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iwl_write_direct32(bus(priv),
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FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
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phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
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iwl_write_direct32(bus(priv),
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FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
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(iwl_get_dma_hi_addr(phy_addr)
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<< FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
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iwl_write_direct32(bus(priv),
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FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
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1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
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1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
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FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
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iwl_write_direct32(bus(priv),
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FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
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FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
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FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
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FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
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IWL_DEBUG_FW(priv, "%s uCode section being loaded...\n", name);
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ret = wait_event_interruptible_timeout(priv->shrd->wait_command_queue,
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priv->ucode_write_complete, 5 * HZ);
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if (ret == -ERESTARTSYS) {
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IWL_ERR(priv, "Could not load the %s uCode section due "
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"to interrupt\n", name);
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return ret;
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}
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if (!ret) {
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IWL_ERR(priv, "Could not load the %s uCode section\n",
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name);
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int iwlagn_load_given_ucode(struct iwl_priv *priv,
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struct fw_img *image)
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{
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int ret = 0;
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ret = iwlagn_load_section(priv, "INST", &image->code,
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IWLAGN_RTC_INST_LOWER_BOUND);
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if (ret)
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return ret;
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return iwlagn_load_section(priv, "DATA", &image->data,
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IWLAGN_RTC_DATA_LOWER_BOUND);
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}
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/*
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* Calibration
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*/
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static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
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{
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struct iwl_calib_xtal_freq_cmd cmd;
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__le16 *xtal_calib =
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(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
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iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
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cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
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cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
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return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
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(u8 *)&cmd, sizeof(cmd));
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}
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static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
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{
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struct iwl_calib_temperature_offset_cmd cmd;
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__le16 *offset_calib =
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(__le16 *)iwl_eeprom_query_addr(priv, EEPROM_TEMPERATURE);
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memset(&cmd, 0, sizeof(cmd));
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iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
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memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(offset_calib));
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if (!(cmd.radio_sensor_offset))
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cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
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IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
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le16_to_cpu(cmd.radio_sensor_offset));
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return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
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(u8 *)&cmd, sizeof(cmd));
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}
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static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
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{
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struct iwl_calib_cfg_cmd calib_cfg_cmd;
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struct iwl_host_cmd cmd = {
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.id = CALIBRATION_CFG_CMD,
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.len = { sizeof(struct iwl_calib_cfg_cmd), },
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.data = { &calib_cfg_cmd, },
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};
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memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
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calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
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calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
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calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
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calib_cfg_cmd.ucd_calib_cfg.flags =
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IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
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return iwl_trans_send_cmd(trans(priv), &cmd);
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}
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void iwlagn_rx_calib_result(struct iwl_priv *priv,
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struct iwl_rx_mem_buffer *rxb)
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{
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struct iwl_rx_packet *pkt = rxb_addr(rxb);
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struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
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int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
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int index;
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/* reduce the size of the length field itself */
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len -= 4;
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/* Define the order in which the results will be sent to the runtime
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* uCode. iwl_send_calib_results sends them in a row according to
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* their index. We sort them here
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*/
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switch (hdr->op_code) {
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case IWL_PHY_CALIBRATE_DC_CMD:
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index = IWL_CALIB_DC;
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break;
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case IWL_PHY_CALIBRATE_LO_CMD:
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index = IWL_CALIB_LO;
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break;
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case IWL_PHY_CALIBRATE_TX_IQ_CMD:
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index = IWL_CALIB_TX_IQ;
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break;
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case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
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index = IWL_CALIB_TX_IQ_PERD;
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break;
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case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
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index = IWL_CALIB_BASE_BAND;
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break;
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default:
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IWL_ERR(priv, "Unknown calibration notification %d\n",
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hdr->op_code);
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return;
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}
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iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
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}
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int iwlagn_init_alive_start(struct iwl_priv *priv)
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{
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int ret;
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if (priv->cfg->bt_params &&
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priv->cfg->bt_params->advanced_bt_coexist) {
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/*
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* Tell uCode we are ready to perform calibration
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* need to perform this before any calibration
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* no need to close the envlope since we are going
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* to load the runtime uCode later.
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*/
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ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
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BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
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if (ret)
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return ret;
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}
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ret = iwlagn_send_calib_cfg(priv);
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if (ret)
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return ret;
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/**
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* temperature offset calibration is only needed for runtime ucode,
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* so prepare the value now.
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*/
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if (priv->cfg->need_temp_offset_calib)
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return iwlagn_set_temperature_offset_calib(priv);
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return 0;
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}
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static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
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{
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struct iwl_wimax_coex_cmd coex_cmd;
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if (priv->cfg->base_params->support_wimax_coexist) {
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/* UnMask wake up src at associated sleep */
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coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
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/* UnMask wake up src at unassociated sleep */
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coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
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memcpy(coex_cmd.sta_prio, cu_priorities,
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sizeof(struct iwl_wimax_coex_event_entry) *
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COEX_NUM_OF_EVENTS);
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/* enabling the coexistence feature */
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coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
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/* enabling the priorities tables */
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coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
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} else {
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/* coexistence is disabled */
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memset(&coex_cmd, 0, sizeof(coex_cmd));
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}
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return iwl_trans_send_cmd_pdu(trans(priv),
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COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
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sizeof(coex_cmd), &coex_cmd);
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}
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static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
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((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
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(0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
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0, 0, 0, 0, 0, 0, 0
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};
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void iwlagn_send_prio_tbl(struct iwl_priv *priv)
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{
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struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
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memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
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sizeof(iwlagn_bt_prio_tbl));
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if (iwl_trans_send_cmd_pdu(trans(priv),
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REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
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sizeof(prio_tbl_cmd), &prio_tbl_cmd))
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IWL_ERR(priv, "failed to send BT prio tbl command\n");
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}
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int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
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{
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struct iwl_bt_coex_prot_env_cmd env_cmd;
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int ret;
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env_cmd.action = action;
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env_cmd.type = type;
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ret = iwl_trans_send_cmd_pdu(trans(priv),
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REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
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sizeof(env_cmd), &env_cmd);
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if (ret)
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IWL_ERR(priv, "failed to send BT env command\n");
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return ret;
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}
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static int iwlagn_alive_notify(struct iwl_priv *priv)
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{
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struct iwl_rxon_context *ctx;
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int ret;
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if (!priv->tx_cmd_pool)
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priv->tx_cmd_pool =
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kmem_cache_create("iwlagn_dev_cmd",
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sizeof(struct iwl_device_cmd),
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sizeof(void *), 0, NULL);
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if (!priv->tx_cmd_pool)
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return -ENOMEM;
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iwl_trans_tx_start(trans(priv));
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for_each_context(priv, ctx)
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ctx->last_tx_rejected = false;
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ret = iwlagn_send_wimax_coex(priv);
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if (ret)
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return ret;
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ret = iwlagn_set_Xtal_calib(priv);
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if (ret)
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return ret;
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return iwl_send_calib_results(priv);
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}
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/**
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* iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
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* using sample data 100 bytes apart. If these sample points are good,
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* it's a pretty good bet that everything between them is good, too.
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*/
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static int iwl_verify_inst_sparse(struct iwl_priv *priv,
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struct fw_desc *fw_desc)
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{
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__le32 *image = (__le32 *)fw_desc->v_addr;
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u32 len = fw_desc->len;
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u32 val;
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u32 i;
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IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
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for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
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/* read data comes through single port, auto-incr addr */
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/* NOTE: Use the debugless read so we don't flood kernel log
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* if IWL_DL_IO is set */
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iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
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i + IWLAGN_RTC_INST_LOWER_BOUND);
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val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
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if (val != le32_to_cpu(*image))
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return -EIO;
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}
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|
|
return 0;
|
|
}
|
|
|
|
static void iwl_print_mismatch_inst(struct iwl_priv *priv,
|
|
struct fw_desc *fw_desc)
|
|
{
|
|
__le32 *image = (__le32 *)fw_desc->v_addr;
|
|
u32 len = fw_desc->len;
|
|
u32 val;
|
|
u32 offs;
|
|
int errors = 0;
|
|
|
|
IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
|
|
|
|
iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
|
|
IWLAGN_RTC_INST_LOWER_BOUND);
|
|
|
|
for (offs = 0;
|
|
offs < len && errors < 20;
|
|
offs += sizeof(u32), image++) {
|
|
/* read data comes through single port, auto-incr addr */
|
|
val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
|
|
if (val != le32_to_cpu(*image)) {
|
|
IWL_ERR(priv, "uCode INST section at "
|
|
"offset 0x%x, is 0x%x, s/b 0x%x\n",
|
|
offs, val, le32_to_cpu(*image));
|
|
errors++;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* iwl_verify_ucode - determine which instruction image is in SRAM,
|
|
* and verify its contents
|
|
*/
|
|
static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
|
|
{
|
|
if (!iwl_verify_inst_sparse(priv, &img->code)) {
|
|
IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
|
|
return 0;
|
|
}
|
|
|
|
IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
|
|
|
|
iwl_print_mismatch_inst(priv, &img->code);
|
|
return -EIO;
|
|
}
|
|
|
|
struct iwlagn_alive_data {
|
|
bool valid;
|
|
u8 subtype;
|
|
};
|
|
|
|
static void iwlagn_alive_fn(struct iwl_priv *priv,
|
|
struct iwl_rx_packet *pkt,
|
|
void *data)
|
|
{
|
|
struct iwlagn_alive_data *alive_data = data;
|
|
struct iwl_alive_resp *palive;
|
|
|
|
palive = &pkt->u.alive_frame;
|
|
|
|
IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
|
|
"0x%01X 0x%01X\n",
|
|
palive->is_valid, palive->ver_type,
|
|
palive->ver_subtype);
|
|
|
|
priv->device_pointers.error_event_table =
|
|
le32_to_cpu(palive->error_event_table_ptr);
|
|
priv->device_pointers.log_event_table =
|
|
le32_to_cpu(palive->log_event_table_ptr);
|
|
|
|
alive_data->subtype = palive->ver_subtype;
|
|
alive_data->valid = palive->is_valid == UCODE_VALID_OK;
|
|
}
|
|
|
|
#define UCODE_ALIVE_TIMEOUT HZ
|
|
#define UCODE_CALIB_TIMEOUT (2*HZ)
|
|
|
|
int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
|
|
struct fw_img *image,
|
|
enum iwlagn_ucode_type ucode_type)
|
|
{
|
|
struct iwl_notification_wait alive_wait;
|
|
struct iwlagn_alive_data alive_data;
|
|
int ret;
|
|
enum iwlagn_ucode_type old_type;
|
|
|
|
ret = iwl_trans_start_device(trans(priv));
|
|
if (ret)
|
|
return ret;
|
|
|
|
iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
|
|
iwlagn_alive_fn, &alive_data);
|
|
|
|
old_type = priv->ucode_type;
|
|
priv->ucode_type = ucode_type;
|
|
|
|
ret = iwlagn_load_given_ucode(priv, image);
|
|
if (ret) {
|
|
priv->ucode_type = old_type;
|
|
iwlagn_remove_notification(priv, &alive_wait);
|
|
return ret;
|
|
}
|
|
|
|
iwl_trans_kick_nic(trans(priv));
|
|
|
|
/*
|
|
* Some things may run in the background now, but we
|
|
* just wait for the ALIVE notification here.
|
|
*/
|
|
ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
|
|
if (ret) {
|
|
priv->ucode_type = old_type;
|
|
return ret;
|
|
}
|
|
|
|
if (!alive_data.valid) {
|
|
IWL_ERR(priv, "Loaded ucode is not valid!\n");
|
|
priv->ucode_type = old_type;
|
|
return -EIO;
|
|
}
|
|
|
|
/*
|
|
* This step takes a long time (60-80ms!!) and
|
|
* WoWLAN image should be loaded quickly, so
|
|
* skip it for WoWLAN.
|
|
*/
|
|
if (ucode_type != IWL_UCODE_WOWLAN) {
|
|
ret = iwl_verify_ucode(priv, image);
|
|
if (ret) {
|
|
priv->ucode_type = old_type;
|
|
return ret;
|
|
}
|
|
|
|
/* delay a bit to give rfkill time to run */
|
|
msleep(5);
|
|
}
|
|
|
|
ret = iwlagn_alive_notify(priv);
|
|
if (ret) {
|
|
IWL_WARN(priv,
|
|
"Could not complete ALIVE transition: %d\n", ret);
|
|
priv->ucode_type = old_type;
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int iwlagn_run_init_ucode(struct iwl_priv *priv)
|
|
{
|
|
struct iwl_notification_wait calib_wait;
|
|
int ret;
|
|
|
|
lockdep_assert_held(&priv->shrd->mutex);
|
|
|
|
/* No init ucode required? Curious, but maybe ok */
|
|
if (!priv->ucode_init.code.len)
|
|
return 0;
|
|
|
|
if (priv->ucode_type != IWL_UCODE_NONE)
|
|
return 0;
|
|
|
|
iwlagn_init_notification_wait(priv, &calib_wait,
|
|
CALIBRATION_COMPLETE_NOTIFICATION,
|
|
NULL, NULL);
|
|
|
|
/* Will also start the device */
|
|
ret = iwlagn_load_ucode_wait_alive(priv, &priv->ucode_init,
|
|
IWL_UCODE_INIT);
|
|
if (ret)
|
|
goto error;
|
|
|
|
ret = iwlagn_init_alive_start(priv);
|
|
if (ret)
|
|
goto error;
|
|
|
|
/*
|
|
* Some things may run in the background now, but we
|
|
* just wait for the calibration complete notification.
|
|
*/
|
|
ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
|
|
|
|
goto out;
|
|
|
|
error:
|
|
iwlagn_remove_notification(priv, &calib_wait);
|
|
out:
|
|
/* Whatever happened, stop the device */
|
|
iwl_trans_stop_device(trans(priv));
|
|
return ret;
|
|
}
|