mainlining shenanigans
ae884ae78a
In master mode, SCLK and LRCLK signals are generated by the CODEC when any of the ADC/DAC are enabled. SCLK is derived from MCLK via a programmable division set by BLK_DIV, LRCLK is derived from MCLK via another programmable division set by ADCFsRatio/DACFsRatio. In slave mode, SCLK and LRCLK signals are received as inputs and supplied externally. LRCLK and SCLK must be synchronously derived from MCLK with specific rates. The device can auto detect MCLK/LRCLK ratio according to a predefined table. LRCLK/SCLK ratio is usually 64 (SCLK = 64 * LRCLK) This commits adds support to let to device auto detect and decide which ratio to use. The mclkdiv2 and BCLK_DIV ratio and put to zero. Signed-off-by: Romain Perier <romain.perier@collabora.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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Linux kernel ============ This file was moved to Documentation/admin-guide/README.rst Please notice that there are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.