232 lines
5.9 KiB
C
232 lines
5.9 KiB
C
/*
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* Copyright 2010 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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#include <core/gpuobj.h>
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#include <subdev/fb.h>
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#include <subdev/timer.h>
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#include <engine/gr.h>
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static void
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nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2])
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{
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u64 phys = 0xdeadcafe00000000ULL;
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u32 coverage = 0;
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if (pgt[0]) {
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/* present, 4KiB pages */
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phys = 0x00000003 | nvkm_memory_addr(pgt[0]);
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coverage = (nvkm_memory_size(pgt[0]) >> 3) << 12;
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} else
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if (pgt[1]) {
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/* present, 64KiB pages */
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phys = 0x00000001 | nvkm_memory_addr(pgt[1]);
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coverage = (nvkm_memory_size(pgt[1]) >> 3) << 16;
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}
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if (phys & 1) {
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if (coverage <= 32 * 1024 * 1024)
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phys |= 0x60;
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else if (coverage <= 64 * 1024 * 1024)
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phys |= 0x40;
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else if (coverage <= 128 * 1024 * 1024)
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phys |= 0x20;
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}
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nvkm_kmap(pgd);
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nvkm_wo32(pgd, (pde * 8) + 0, lower_32_bits(phys));
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nvkm_wo32(pgd, (pde * 8) + 4, upper_32_bits(phys));
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nvkm_done(pgd);
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}
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static inline u64
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vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target)
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{
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phys |= 1; /* present */
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phys |= (u64)memtype << 40;
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phys |= target << 4;
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if (vma->access & NV_MEM_ACCESS_SYS)
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phys |= (1 << 6);
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if (!(vma->access & NV_MEM_ACCESS_WO))
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phys |= (1 << 3);
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return phys;
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}
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static void
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nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
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{
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struct nvkm_ram *ram = vma->vm->mmu->subdev.device->fb->ram;
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u32 comp = (mem->memtype & 0x180) >> 7;
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u32 block, target;
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int i;
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/* IGPs don't have real VRAM, re-target to stolen system memory */
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target = 0;
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if (ram->stolen) {
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phys += ram->stolen;
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target = 3;
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}
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phys = vm_addr(vma, phys, mem->memtype, target);
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pte <<= 3;
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cnt <<= 3;
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nvkm_kmap(pgt);
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while (cnt) {
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u32 offset_h = upper_32_bits(phys);
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u32 offset_l = lower_32_bits(phys);
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for (i = 7; i >= 0; i--) {
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block = 1 << (i + 3);
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if (cnt >= block && !(pte & (block - 1)))
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break;
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}
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offset_l |= (i << 7);
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phys += block << (vma->node->type - 3);
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cnt -= block;
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if (comp) {
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u32 tag = mem->tag->offset + ((delta >> 16) * comp);
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offset_h |= (tag << 17);
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delta += block << (vma->node->type - 3);
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}
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while (block) {
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nvkm_wo32(pgt, pte + 0, offset_l);
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nvkm_wo32(pgt, pte + 4, offset_h);
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pte += 8;
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block -= 8;
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}
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}
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nvkm_done(pgt);
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}
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static void
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nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
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{
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u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 3 : 2;
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pte <<= 3;
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nvkm_kmap(pgt);
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while (cnt--) {
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u64 phys = vm_addr(vma, (u64)*list++, mem->memtype, target);
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nvkm_wo32(pgt, pte + 0, lower_32_bits(phys));
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nvkm_wo32(pgt, pte + 4, upper_32_bits(phys));
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pte += 8;
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}
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nvkm_done(pgt);
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}
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static void
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nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
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{
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pte <<= 3;
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nvkm_kmap(pgt);
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while (cnt--) {
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nvkm_wo32(pgt, pte + 0, 0x00000000);
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nvkm_wo32(pgt, pte + 4, 0x00000000);
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pte += 8;
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}
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nvkm_done(pgt);
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}
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static void
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nv50_vm_flush(struct nvkm_vm *vm)
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{
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struct nvkm_mmu *mmu = vm->mmu;
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struct nvkm_subdev *subdev = &mmu->subdev;
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struct nvkm_device *device = subdev->device;
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int i, vme;
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mutex_lock(&subdev->mutex);
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for (i = 0; i < NVKM_SUBDEV_NR; i++) {
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if (!atomic_read(&vm->engref[i]))
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continue;
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/* unfortunate hw bug workaround... */
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if (i == NVKM_ENGINE_GR && device->gr) {
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int ret = nvkm_gr_tlb_flush(device->gr);
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if (ret != -ENODEV)
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continue;
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}
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switch (i) {
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case NVKM_ENGINE_GR : vme = 0x00; break;
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case NVKM_ENGINE_VP :
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case NVKM_ENGINE_MSPDEC: vme = 0x01; break;
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case NVKM_SUBDEV_BAR : vme = 0x06; break;
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case NVKM_ENGINE_MSPPP :
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case NVKM_ENGINE_MPEG : vme = 0x08; break;
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case NVKM_ENGINE_BSP :
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case NVKM_ENGINE_MSVLD : vme = 0x09; break;
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case NVKM_ENGINE_CIPHER:
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case NVKM_ENGINE_SEC : vme = 0x0a; break;
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case NVKM_ENGINE_CE0 : vme = 0x0d; break;
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default:
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continue;
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}
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nvkm_wr32(device, 0x100c80, (vme << 16) | 1);
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if (nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x100c80) & 0x00000001))
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break;
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) < 0)
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nvkm_error(subdev, "vm flush timeout: engine %d\n", vme);
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}
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mutex_unlock(&subdev->mutex);
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}
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static int
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nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset,
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struct lock_class_key *key, struct nvkm_vm **pvm)
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{
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u32 block = (1 << (mmu->func->pgt_bits + 12));
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if (block > length)
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block = length;
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return nvkm_vm_create(mmu, offset, length, mm_offset, block, key, pvm);
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}
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static const struct nvkm_mmu_func
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nv50_mmu = {
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.limit = (1ULL << 40),
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.dma_bits = 40,
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.pgt_bits = 29 - 12,
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.spg_shift = 12,
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.lpg_shift = 16,
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.create = nv50_vm_create,
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.map_pgt = nv50_vm_map_pgt,
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.map = nv50_vm_map,
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.map_sg = nv50_vm_map_sg,
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.unmap = nv50_vm_unmap,
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.flush = nv50_vm_flush,
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};
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int
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nv50_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
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{
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return nvkm_mmu_new_(&nv50_mmu, device, index, pmmu);
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}
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