ae07809255
This adds more debugfs consumers. The debugfs entries read some important registers, fifo status, QMU ring, endpoint status, and IPPC probe interface to get internal status. With these entries, users can check the registers, endpoint and GPD used during run time. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
545 lines
12 KiB
C
545 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
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*/
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include "mtu3.h"
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#include "mtu3_dr.h"
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#include "mtu3_debug.h"
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/* u2-port0 should be powered on and enabled; */
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int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
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{
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void __iomem *ibase = ssusb->ippc_base;
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u32 value, check_val;
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int ret;
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check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
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SSUSB_REF_RST_B_STS;
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ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
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(check_val == (value & check_val)), 100, 20000);
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if (ret) {
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dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
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return ret;
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}
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ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
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(value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
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if (ret) {
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dev_err(ssusb->dev, "mac2 clock is not stable\n");
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return ret;
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}
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return 0;
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}
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static int ssusb_phy_init(struct ssusb_mtk *ssusb)
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{
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int i;
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int ret;
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for (i = 0; i < ssusb->num_phys; i++) {
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ret = phy_init(ssusb->phys[i]);
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if (ret)
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goto exit_phy;
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}
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return 0;
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exit_phy:
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for (; i > 0; i--)
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phy_exit(ssusb->phys[i - 1]);
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return ret;
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}
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static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
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{
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int i;
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for (i = 0; i < ssusb->num_phys; i++)
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phy_exit(ssusb->phys[i]);
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return 0;
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}
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static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
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{
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int i;
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int ret;
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for (i = 0; i < ssusb->num_phys; i++) {
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ret = phy_power_on(ssusb->phys[i]);
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if (ret)
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goto power_off_phy;
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}
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return 0;
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power_off_phy:
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for (; i > 0; i--)
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phy_power_off(ssusb->phys[i - 1]);
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return ret;
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}
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static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
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{
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unsigned int i;
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for (i = 0; i < ssusb->num_phys; i++)
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phy_power_off(ssusb->phys[i]);
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}
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static int ssusb_clks_enable(struct ssusb_mtk *ssusb)
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{
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int ret;
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ret = clk_prepare_enable(ssusb->sys_clk);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable sys_clk\n");
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goto sys_clk_err;
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}
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ret = clk_prepare_enable(ssusb->ref_clk);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable ref_clk\n");
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goto ref_clk_err;
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}
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ret = clk_prepare_enable(ssusb->mcu_clk);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable mcu_clk\n");
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goto mcu_clk_err;
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}
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ret = clk_prepare_enable(ssusb->dma_clk);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable dma_clk\n");
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goto dma_clk_err;
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}
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return 0;
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dma_clk_err:
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clk_disable_unprepare(ssusb->mcu_clk);
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mcu_clk_err:
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clk_disable_unprepare(ssusb->ref_clk);
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ref_clk_err:
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clk_disable_unprepare(ssusb->sys_clk);
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sys_clk_err:
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return ret;
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}
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static void ssusb_clks_disable(struct ssusb_mtk *ssusb)
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{
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clk_disable_unprepare(ssusb->dma_clk);
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clk_disable_unprepare(ssusb->mcu_clk);
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clk_disable_unprepare(ssusb->ref_clk);
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clk_disable_unprepare(ssusb->sys_clk);
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}
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static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
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{
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int ret = 0;
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ret = regulator_enable(ssusb->vusb33);
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if (ret) {
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dev_err(ssusb->dev, "failed to enable vusb33\n");
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goto vusb33_err;
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}
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ret = ssusb_clks_enable(ssusb);
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if (ret)
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goto clks_err;
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ret = ssusb_phy_init(ssusb);
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if (ret) {
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dev_err(ssusb->dev, "failed to init phy\n");
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goto phy_init_err;
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}
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ret = ssusb_phy_power_on(ssusb);
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if (ret) {
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dev_err(ssusb->dev, "failed to power on phy\n");
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goto phy_err;
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}
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return 0;
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phy_err:
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ssusb_phy_exit(ssusb);
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phy_init_err:
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ssusb_clks_disable(ssusb);
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clks_err:
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regulator_disable(ssusb->vusb33);
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vusb33_err:
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return ret;
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}
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static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
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{
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ssusb_clks_disable(ssusb);
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regulator_disable(ssusb->vusb33);
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ssusb_phy_power_off(ssusb);
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ssusb_phy_exit(ssusb);
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}
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static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
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{
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/* reset whole ip (xhci & u3d) */
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mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
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udelay(1);
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mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
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/*
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* device ip may be powered on in firmware/BROM stage before entering
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* kernel stage;
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* power down device ip, otherwise ip-sleep will fail when working as
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* host only mode
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*/
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mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
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}
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/* ignore the error if the clock does not exist */
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static struct clk *get_optional_clk(struct device *dev, const char *id)
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{
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struct clk *opt_clk;
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opt_clk = devm_clk_get(dev, id);
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/* ignore error number except EPROBE_DEFER */
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if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
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opt_clk = NULL;
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return opt_clk;
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}
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static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
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{
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struct device_node *node = pdev->dev.of_node;
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struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
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struct device *dev = &pdev->dev;
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struct resource *res;
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int i;
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int ret;
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ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
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if (IS_ERR(ssusb->vusb33)) {
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dev_err(dev, "failed to get vusb33\n");
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return PTR_ERR(ssusb->vusb33);
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}
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ssusb->sys_clk = devm_clk_get(dev, "sys_ck");
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if (IS_ERR(ssusb->sys_clk)) {
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dev_err(dev, "failed to get sys clock\n");
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return PTR_ERR(ssusb->sys_clk);
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}
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ssusb->ref_clk = get_optional_clk(dev, "ref_ck");
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if (IS_ERR(ssusb->ref_clk))
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return PTR_ERR(ssusb->ref_clk);
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ssusb->mcu_clk = get_optional_clk(dev, "mcu_ck");
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if (IS_ERR(ssusb->mcu_clk))
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return PTR_ERR(ssusb->mcu_clk);
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ssusb->dma_clk = get_optional_clk(dev, "dma_ck");
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if (IS_ERR(ssusb->dma_clk))
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return PTR_ERR(ssusb->dma_clk);
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ssusb->num_phys = of_count_phandle_with_args(node,
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"phys", "#phy-cells");
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if (ssusb->num_phys > 0) {
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ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
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sizeof(*ssusb->phys), GFP_KERNEL);
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if (!ssusb->phys)
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return -ENOMEM;
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} else {
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ssusb->num_phys = 0;
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}
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for (i = 0; i < ssusb->num_phys; i++) {
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ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
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if (IS_ERR(ssusb->phys[i])) {
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dev_err(dev, "failed to get phy-%d\n", i);
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return PTR_ERR(ssusb->phys[i]);
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}
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}
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
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ssusb->ippc_base = devm_ioremap_resource(dev, res);
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if (IS_ERR(ssusb->ippc_base))
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return PTR_ERR(ssusb->ippc_base);
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ssusb->dr_mode = usb_get_dr_mode(dev);
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if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
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ssusb->dr_mode = USB_DR_MODE_OTG;
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if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
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goto out;
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/* if host role is supported */
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ret = ssusb_wakeup_of_property_parse(ssusb, node);
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if (ret) {
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dev_err(dev, "failed to parse uwk property\n");
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return ret;
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}
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/* optional property, ignore the error if it does not exist */
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of_property_read_u32(node, "mediatek,u3p-dis-msk",
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&ssusb->u3p_dis_msk);
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otg_sx->vbus = devm_regulator_get(dev, "vbus");
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if (IS_ERR(otg_sx->vbus)) {
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dev_err(dev, "failed to get vbus\n");
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return PTR_ERR(otg_sx->vbus);
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}
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if (ssusb->dr_mode == USB_DR_MODE_HOST)
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goto out;
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/* if dual-role mode is supported */
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otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
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otg_sx->manual_drd_enabled =
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of_property_read_bool(node, "enable-manual-drd");
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if (of_property_read_bool(node, "extcon")) {
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otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
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if (IS_ERR(otg_sx->edev)) {
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dev_err(ssusb->dev, "couldn't get extcon device\n");
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return PTR_ERR(otg_sx->edev);
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}
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}
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out:
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dev_info(dev, "dr_mode: %d, is_u3_dr: %d, u3p_dis_msk: %x, drd: %s\n",
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ssusb->dr_mode, otg_sx->is_u3_drd, ssusb->u3p_dis_msk,
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otg_sx->manual_drd_enabled ? "manual" : "auto");
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return 0;
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}
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static int mtu3_probe(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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struct device *dev = &pdev->dev;
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struct ssusb_mtk *ssusb;
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int ret = -ENOMEM;
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/* all elements are set to ZERO as default value */
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ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
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if (!ssusb)
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return -ENOMEM;
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ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
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if (ret) {
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dev_err(dev, "No suitable DMA config available\n");
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return -ENOTSUPP;
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}
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platform_set_drvdata(pdev, ssusb);
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ssusb->dev = dev;
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ret = get_ssusb_rscs(pdev, ssusb);
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if (ret)
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return ret;
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ssusb_debugfs_create_root(ssusb);
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/* enable power domain */
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pm_runtime_enable(dev);
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pm_runtime_get_sync(dev);
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device_enable_async_suspend(dev);
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ret = ssusb_rscs_init(ssusb);
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if (ret)
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goto comm_init_err;
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ssusb_ip_sw_reset(ssusb);
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if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
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ssusb->dr_mode = USB_DR_MODE_HOST;
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else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
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ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
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/* default as host */
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ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
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switch (ssusb->dr_mode) {
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case USB_DR_MODE_PERIPHERAL:
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ret = ssusb_gadget_init(ssusb);
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if (ret) {
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dev_err(dev, "failed to initialize gadget\n");
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goto comm_exit;
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}
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break;
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case USB_DR_MODE_HOST:
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ret = ssusb_host_init(ssusb, node);
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if (ret) {
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dev_err(dev, "failed to initialize host\n");
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goto comm_exit;
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}
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break;
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case USB_DR_MODE_OTG:
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ret = ssusb_gadget_init(ssusb);
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if (ret) {
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dev_err(dev, "failed to initialize gadget\n");
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goto comm_exit;
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}
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ret = ssusb_host_init(ssusb, node);
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if (ret) {
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dev_err(dev, "failed to initialize host\n");
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goto gadget_exit;
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}
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ret = ssusb_otg_switch_init(ssusb);
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if (ret) {
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dev_err(dev, "failed to initialize switch\n");
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goto host_exit;
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}
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break;
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default:
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dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
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ret = -EINVAL;
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goto comm_exit;
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}
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return 0;
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host_exit:
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ssusb_host_exit(ssusb);
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gadget_exit:
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ssusb_gadget_exit(ssusb);
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comm_exit:
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ssusb_rscs_exit(ssusb);
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comm_init_err:
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pm_runtime_put_sync(dev);
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pm_runtime_disable(dev);
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ssusb_debugfs_remove_root(ssusb);
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return ret;
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}
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static int mtu3_remove(struct platform_device *pdev)
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{
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struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
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switch (ssusb->dr_mode) {
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case USB_DR_MODE_PERIPHERAL:
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ssusb_gadget_exit(ssusb);
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break;
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case USB_DR_MODE_HOST:
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ssusb_host_exit(ssusb);
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break;
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case USB_DR_MODE_OTG:
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ssusb_otg_switch_exit(ssusb);
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ssusb_gadget_exit(ssusb);
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ssusb_host_exit(ssusb);
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break;
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default:
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return -EINVAL;
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}
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ssusb_rscs_exit(ssusb);
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pm_runtime_put_sync(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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ssusb_debugfs_remove_root(ssusb);
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return 0;
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}
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/*
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* when support dual-role mode, we reject suspend when
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* it works as device mode;
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*/
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static int __maybe_unused mtu3_suspend(struct device *dev)
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{
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struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
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dev_dbg(dev, "%s\n", __func__);
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/* REVISIT: disconnect it for only device mode? */
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if (!ssusb->is_host)
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return 0;
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ssusb_host_disable(ssusb, true);
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ssusb_phy_power_off(ssusb);
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ssusb_clks_disable(ssusb);
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ssusb_wakeup_set(ssusb, true);
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return 0;
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}
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static int __maybe_unused mtu3_resume(struct device *dev)
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{
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struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
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int ret;
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dev_dbg(dev, "%s\n", __func__);
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if (!ssusb->is_host)
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return 0;
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ssusb_wakeup_set(ssusb, false);
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ret = ssusb_clks_enable(ssusb);
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if (ret)
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goto clks_err;
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ret = ssusb_phy_power_on(ssusb);
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if (ret)
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goto phy_err;
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ssusb_host_enable(ssusb);
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return 0;
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phy_err:
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ssusb_clks_disable(ssusb);
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clks_err:
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|
return ret;
|
|
}
|
|
|
|
static const struct dev_pm_ops mtu3_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
|
|
};
|
|
|
|
#define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
|
|
|
|
#ifdef CONFIG_OF
|
|
|
|
static const struct of_device_id mtu3_of_match[] = {
|
|
{.compatible = "mediatek,mt8173-mtu3",},
|
|
{.compatible = "mediatek,mtu3",},
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, mtu3_of_match);
|
|
|
|
#endif
|
|
|
|
static struct platform_driver mtu3_driver = {
|
|
.probe = mtu3_probe,
|
|
.remove = mtu3_remove,
|
|
.driver = {
|
|
.name = MTU3_DRIVER_NAME,
|
|
.pm = DEV_PM_OPS,
|
|
.of_match_table = of_match_ptr(mtu3_of_match),
|
|
},
|
|
};
|
|
module_platform_driver(mtu3_driver);
|
|
|
|
MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
|