adf38bb0b5
The low-pin-count (LPC) interface of Hip06/Hip07 accesses I/O port space of peripherals. Implement the LPC host controller driver which performs the I/O operations on the underlying hardware. We don't want to touch existing drivers such as ipmi-bt, so this driver applies the indirect-IO introduced in the previous patch after registering an indirect-IO node to the indirect-IO devices list which will be searched by the I/O accessors to retrieve the host-local I/O port. The driver config is set as a bool instead of a tristate. The reason here is that, by the very nature of the driver providing a logical PIO range, it does not make sense to have this driver as a loadable module. Another more specific reason is that the Huawei D03 board which includes Hip06 SoC requires the LPC bus for UART console, so should be built in. Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Zou Rongrong <zourongrong@huawei.com> Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> # dts part |
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.. | ||
arm-cci.c | ||
arm-ccn.c | ||
brcmstb_gisb.c | ||
da8xx-mstpri.c | ||
hisi_lpc.c | ||
imx-weim.c | ||
Kconfig | ||
Makefile | ||
mips_cdmm.c | ||
mvebu-mbus.c | ||
omap_l3_noc.c | ||
omap_l3_noc.h | ||
omap_l3_smx.c | ||
omap_l3_smx.h | ||
omap-ocp2scp.c | ||
qcom-ebi2.c | ||
simple-pm-bus.c | ||
sunxi-rsb.c | ||
tegra-aconnect.c | ||
tegra-gmi.c | ||
ti-sysc.c | ||
ts-nbus.c | ||
uniphier-system-bus.c | ||
vexpress-config.c |