acec0ce081
It's a waste for the four X86_FEATURE_CQM_* feature bits to occupy two whole feature bits words. To better utilize feature words, re-define word 11 to host scattered features and move the four X86_FEATURE_CQM_* features into Linux defined word 11. More scattered features can be added in word 11 in the future. Rename leaf 11 in cpuid_leafs to CPUID_LNX_4 to reflect it's a Linux-defined leaf. Rename leaf 12 as CPUID_DUMMY which will be replaced by a meaningful name in the next patch when CPUID.7.1:EAX occupies world 12. Maximum number of RMID and cache occupancy scale are retrieved from CPUID.0xf.1 after scattered CQM features are enumerated. Carve out the code into a separate function. KVM doesn't support resctrl now. So it's safe to move the X86_FEATURE_CQM_* features to scattered features word 11 for KVM. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Aaron Lewis <aaronlewis@google.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Babu Moger <babu.moger@amd.com> Cc: "Chang S. Bae" <chang.seok.bae@intel.com> Cc: "Sean J Christopherson" <sean.j.christopherson@intel.com> Cc: Frederic Weisbecker <frederic@kernel.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jann Horn <jannh@google.com> Cc: Juergen Gross <jgross@suse.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: kvm ML <kvm@vger.kernel.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Masami Hiramatsu <mhiramat@kernel.org> Cc: Nadav Amit <namit@vmware.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Pavel Tatashin <pasha.tatashin@oracle.com> Cc: Peter Feiner <pfeiner@google.com> Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org> Cc: "Radim Krčmář" <rkrcmar@redhat.com> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: Ravi V Shankar <ravi.v.shankar@intel.com> Cc: Sherry Hurwitz <sherry.hurwitz@amd.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Thomas Lendacky <Thomas.Lendacky@amd.com> Cc: x86 <x86@kernel.org> Link: https://lkml.kernel.org/r/1560794416-217638-2-git-send-email-fenghua.yu@intel.com
235 lines
8.2 KiB
C
235 lines
8.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_CPUFEATURE_H
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#define _ASM_X86_CPUFEATURE_H
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#include <asm/processor.h>
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#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
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#include <asm/asm.h>
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#include <linux/bitops.h>
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enum cpuid_leafs
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{
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CPUID_1_EDX = 0,
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CPUID_8000_0001_EDX,
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CPUID_8086_0001_EDX,
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CPUID_LNX_1,
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CPUID_1_ECX,
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CPUID_C000_0001_EDX,
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CPUID_8000_0001_ECX,
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CPUID_LNX_2,
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CPUID_LNX_3,
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CPUID_7_0_EBX,
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CPUID_D_1_EAX,
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CPUID_LNX_4,
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CPUID_DUMMY,
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CPUID_8000_0008_EBX,
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CPUID_6_EAX,
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CPUID_8000_000A_EDX,
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CPUID_7_ECX,
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CPUID_8000_0007_EBX,
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CPUID_7_EDX,
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};
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#ifdef CONFIG_X86_FEATURE_NAMES
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extern const char * const x86_cap_flags[NCAPINTS*32];
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extern const char * const x86_power_flags[32];
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#define X86_CAP_FMT "%s"
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#define x86_cap_flag(flag) x86_cap_flags[flag]
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#else
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#define X86_CAP_FMT "%d:%d"
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#define x86_cap_flag(flag) ((flag) >> 5), ((flag) & 31)
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#endif
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/*
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* In order to save room, we index into this array by doing
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* X86_BUG_<name> - NCAPINTS*32.
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*/
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extern const char * const x86_bug_flags[NBUGINTS*32];
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#define test_cpu_cap(c, bit) \
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test_bit(bit, (unsigned long *)((c)->x86_capability))
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/*
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* There are 32 bits/features in each mask word. The high bits
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* (selected with (bit>>5) give us the word number and the low 5
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* bits give us the bit/feature number inside the word.
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* (1UL<<((bit)&31) gives us a mask for the feature_bit so we can
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* see if it is set in the mask word.
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*/
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#define CHECK_BIT_IN_MASK_WORD(maskname, word, bit) \
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(((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
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#define REQUIRED_MASK_BIT_SET(feature_bit) \
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( CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 0, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 1, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 2, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 3, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 4, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 5, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 6, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 7, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 8, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 9, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 10, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 11, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 12, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 13, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 14, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 15, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 16, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 17, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(REQUIRED_MASK, 18, feature_bit) || \
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REQUIRED_MASK_CHECK || \
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BUILD_BUG_ON_ZERO(NCAPINTS != 19))
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#define DISABLED_MASK_BIT_SET(feature_bit) \
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( CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 0, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 1, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 2, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 3, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 4, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 5, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 6, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 7, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 8, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 9, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 10, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 11, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 12, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 13, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 14, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 15, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 16, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 17, feature_bit) || \
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CHECK_BIT_IN_MASK_WORD(DISABLED_MASK, 18, feature_bit) || \
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DISABLED_MASK_CHECK || \
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BUILD_BUG_ON_ZERO(NCAPINTS != 19))
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#define cpu_has(c, bit) \
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(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
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test_cpu_cap(c, bit))
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#define this_cpu_has(bit) \
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(__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
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x86_this_cpu_test_bit(bit, \
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(unsigned long __percpu *)&cpu_info.x86_capability))
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/*
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* This macro is for detection of features which need kernel
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* infrastructure to be used. It may *not* directly test the CPU
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* itself. Use the cpu_has() family if you want true runtime
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* testing of CPU features, like in hypervisor code where you are
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* supporting a possible guest feature where host support for it
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* is not relevant.
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*/
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#define cpu_feature_enabled(bit) \
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(__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
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#define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit)
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#define set_cpu_cap(c, bit) set_bit(bit, (unsigned long *)((c)->x86_capability))
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extern void setup_clear_cpu_cap(unsigned int bit);
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extern void clear_cpu_cap(struct cpuinfo_x86 *c, unsigned int bit);
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#define setup_force_cpu_cap(bit) do { \
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set_cpu_cap(&boot_cpu_data, bit); \
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set_bit(bit, (unsigned long *)cpu_caps_set); \
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} while (0)
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#define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit)
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#if defined(__clang__) && !defined(CONFIG_CC_HAS_ASM_GOTO)
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/*
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* Workaround for the sake of BPF compilation which utilizes kernel
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* headers, but clang does not support ASM GOTO and fails the build.
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*/
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#ifndef __BPF_TRACING__
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#warning "Compiler lacks ASM_GOTO support. Add -D __BPF_TRACING__ to your compiler arguments"
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#endif
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#define static_cpu_has(bit) boot_cpu_has(bit)
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#else
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/*
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* Static testing of CPU features. Used the same as boot_cpu_has(). It
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* statically patches the target code for additional performance. Use
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* static_cpu_has() only in fast paths, where every cycle counts. Which
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* means that the boot_cpu_has() variant is already fast enough for the
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* majority of cases and you should stick to using it as it is generally
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* only two instructions: a RIP-relative MOV and a TEST.
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*/
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static __always_inline bool _static_cpu_has(u16 bit)
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{
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asm_volatile_goto("1: jmp 6f\n"
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"2:\n"
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".skip -(((5f-4f) - (2b-1b)) > 0) * "
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"((5f-4f) - (2b-1b)),0x90\n"
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"3:\n"
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".section .altinstructions,\"a\"\n"
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" .long 1b - .\n" /* src offset */
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" .long 4f - .\n" /* repl offset */
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" .word %P[always]\n" /* always replace */
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" .byte 3b - 1b\n" /* src len */
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" .byte 5f - 4f\n" /* repl len */
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" .byte 3b - 2b\n" /* pad len */
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".previous\n"
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".section .altinstr_replacement,\"ax\"\n"
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"4: jmp %l[t_no]\n"
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"5:\n"
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".previous\n"
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".section .altinstructions,\"a\"\n"
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" .long 1b - .\n" /* src offset */
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" .long 0\n" /* no replacement */
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" .word %P[feature]\n" /* feature bit */
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" .byte 3b - 1b\n" /* src len */
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" .byte 0\n" /* repl len */
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" .byte 0\n" /* pad len */
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".previous\n"
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".section .altinstr_aux,\"ax\"\n"
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"6:\n"
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" testb %[bitnum],%[cap_byte]\n"
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" jnz %l[t_yes]\n"
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" jmp %l[t_no]\n"
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".previous\n"
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: : [feature] "i" (bit),
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[always] "i" (X86_FEATURE_ALWAYS),
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[bitnum] "i" (1 << (bit & 7)),
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[cap_byte] "m" (((const char *)boot_cpu_data.x86_capability)[bit >> 3])
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: : t_yes, t_no);
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t_yes:
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return true;
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t_no:
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return false;
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}
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#define static_cpu_has(bit) \
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( \
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__builtin_constant_p(boot_cpu_has(bit)) ? \
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boot_cpu_has(bit) : \
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_static_cpu_has(bit) \
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)
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#endif
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#define cpu_has_bug(c, bit) cpu_has(c, (bit))
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#define set_cpu_bug(c, bit) set_cpu_cap(c, (bit))
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#define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit))
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#define static_cpu_has_bug(bit) static_cpu_has((bit))
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#define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit))
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#define boot_cpu_set_bug(bit) set_cpu_cap(&boot_cpu_data, (bit))
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#define MAX_CPU_FEATURES (NCAPINTS * 32)
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#define cpu_have_feature boot_cpu_has
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#define CPU_FEATURE_TYPEFMT "x86,ven%04Xfam%04Xmod%04X"
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#define CPU_FEATURE_TYPEVAL boot_cpu_data.x86_vendor, boot_cpu_data.x86, \
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boot_cpu_data.x86_model
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#endif /* defined(__KERNEL__) && !defined(__ASSEMBLY__) */
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#endif /* _ASM_X86_CPUFEATURE_H */
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