linux/arch/mips/include/asm/octeon
David Daney aa32a955ae MIPS: Octeon: Update register definitions for CN63XX chips
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together.  This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-29 19:08:33 +01:00
..
cvmx-agl-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-asm.h
cvmx-bootinfo.h MIPS: Cavium-Octeon: Add more board type constants. 2009-06-17 11:06:29 +01:00
cvmx-bootmem.h MIPS: Add named alloc functions to OCTEON boot monitor memory allocator. 2009-06-17 11:06:29 +01:00
cvmx-ciu-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-gpio-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-helper-errata.h MIPS: Add Cavium OCTEON PCI support. 2009-06-17 11:06:25 +01:00
cvmx-helper-jtag.h MIPS: Add Cavium OCTEON PCI support. 2009-06-17 11:06:25 +01:00
cvmx-iob-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-ipd-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-l2c-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-l2c.h
cvmx-l2d-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-l2t-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-led-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-mio-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-mixx-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-npei-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-npi-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-packet.h
cvmx-pci-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-pcieep-defs.h MIPS: Add register definitions for PCI. 2009-06-17 11:06:25 +01:00
cvmx-pciercx-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-pescx-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-pexp-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-pow-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-rnm-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-smix-defs.h MIPS: Octeon: Update register definitions for CN63XX chips 2010-10-29 19:08:33 +01:00
cvmx-spinlock.h
cvmx-sysinfo.h
cvmx.h MIPS: Octeon: Check all CCAs in cvmx_write_csr. 2009-09-17 20:07:41 +02:00
octeon-feature.h MIPS: Cleanup switches with cases that can be merged 2010-02-27 12:53:14 +01:00
octeon-model.h
octeon.h MIPS: Octeon: Implement delays with cycle counter. 2010-08-05 13:26:20 +01:00
pci-octeon.h MIPS: Octeon: Rewrite DMA mapping functions. 2010-10-29 19:08:32 +01:00