a92e7c3d82
When the CS line is not connected, it is not needed to enable or disable the chip selection functionality from the s3c64xx devices in order to perform a transfer. Set the CS controller logically always enabled already during initialization (by writing '0' in the S3C64XX_SPI_SLAVE_SEL register) and never disable it. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
113 lines
3.1 KiB
Plaintext
113 lines
3.1 KiB
Plaintext
* Samsung SPI Controller
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The Samsung SPI controller is used to interface with various devices such as flash
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and display controllers using the SPI communication interface.
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Required SoC Specific Properties:
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- compatible: should be one of the following.
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- samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
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- samsung,s3c6410-spi: for s3c6410 platforms
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- samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
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- samsung,exynos7-spi: for exynos7 platforms
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: The interrupt number to the cpu. The interrupt specifier format
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depends on the interrupt controller.
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- dmas : Two or more DMA channel specifiers following the convention outlined
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in bindings/dma/dma.txt
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- dma-names: Names for the dma channels. There must be at least one channel
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named "tx" for transmit and named "rx" for receive.
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Required Board Specific Properties:
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- #address-cells: should be 1.
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- #size-cells: should be 0.
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Optional Board Specific Properties:
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- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
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select the clock source for the spi bus clock, this property can be used to
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indicate the clock to be used for driving the spi bus clock. If not specified,
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the clock number 0 is used as default.
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- num-cs: Specifies the number of chip select lines supported. If
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not specified, the default number of chip select lines is set to 1.
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- cs-gpios: should specify GPIOs used for chipselects (see spi-bus.txt)
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- no-cs-readback: the CS line is disconnected, therefore the device should not
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operate based on CS signalling.
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SPI Controller specific data in SPI slave nodes:
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- The spi slave nodes should provide the following information which is required
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by the spi controller.
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- samsung,spi-feedback-delay: The sampling phase shift to be applied on the
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miso line (to account for any lag in the miso line). The following are the
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valid values.
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- 0: No phase shift.
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- 1: 90 degree phase shift sampling.
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- 2: 180 degree phase shift sampling.
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- 3: 270 degree phase shift sampling.
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Aliases:
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- All the SPI controller nodes should be represented in the aliases node using
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the following format 'spi{n}' where n is a unique number for the alias.
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Example:
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- SoC Specific Portion:
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spi_0: spi@12d20000 {
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compatible = "samsung,exynos4210-spi";
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reg = <0x12d20000 0x100>;
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interrupts = <0 66 0>;
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dmas = <&pdma0 5
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&pdma0 4>;
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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- Board Specific Portion:
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spi_0: spi@12d20000 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_bus>;
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cs-gpios = <&gpa2 5 0>;
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w25q80bw@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "w25x80";
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reg = <0>;
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spi-max-frequency = <10000>;
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controller-data {
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samsung,spi-feedback-delay = <0>;
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};
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partition@0 {
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label = "U-Boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "Kernel";
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reg = <0x40000 0xc0000>;
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};
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};
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};
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