This converts the SA11x0 frame buffer driver to use GPIO descriptors. Get the GPIO optional and register a look-up table specifically for the Shannon machine. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200415165055.193113-1-linus.walleij@linaro.org
		
			
				
	
	
		
			102 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			102 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * linux/drivers/video/sa1100fb.h
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|  *    -- StrongARM 1100 LCD Controller Frame Buffer Device
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|  *
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|  *  Copyright (C) 1999 Eric A. Thomas
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|  *   Based on acornfb.c Copyright (C) Russell King.
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|  *  
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file COPYING in the main directory of this archive
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|  * for more details.
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|  */
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| 
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| struct gpio_desc;
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| 
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| #define LCCR0           0x0000          /* LCD Control Reg. 0 */
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| #define LCSR            0x0004          /* LCD Status Reg. */
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| #define DBAR1           0x0010          /* LCD DMA Base Address Reg. channel 1 */
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| #define DCAR1           0x0014          /* LCD DMA Current Address Reg. channel 1 */
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| #define DBAR2           0x0018          /* LCD DMA Base Address Reg.  channel 2 */
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| #define DCAR2           0x001C          /* LCD DMA Current Address Reg. channel 2 */
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| #define LCCR1           0x0020          /* LCD Control Reg. 1 */
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| #define LCCR2           0x0024          /* LCD Control Reg. 2 */
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| #define LCCR3           0x0028          /* LCD Control Reg. 3 */
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| 
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| /* Shadows for LCD controller registers */
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| struct sa1100fb_lcd_reg {
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| 	unsigned long lccr0;
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| 	unsigned long lccr1;
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| 	unsigned long lccr2;
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| 	unsigned long lccr3;
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| };
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| 
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| struct sa1100fb_info {
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| 	struct fb_info		fb;
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| 	struct device		*dev;
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| 	const struct sa1100fb_rgb *rgb[NR_RGB];
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| 	void __iomem		*base;
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| 	struct gpio_desc	*shannon_lcden;
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| 
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| 	/*
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| 	 * These are the addresses we mapped
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| 	 * the framebuffer memory region to.
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| 	 */
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| 	dma_addr_t		map_dma;
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| 	u_char *		map_cpu;
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| 	u_int			map_size;
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| 
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| 	u_char *		screen_cpu;
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| 	dma_addr_t		screen_dma;
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| 	u16 *			palette_cpu;
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| 	dma_addr_t		palette_dma;
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| 	u_int			palette_size;
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| 
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| 	dma_addr_t		dbar1;
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| 	dma_addr_t		dbar2;
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| 
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| 	u_int			reg_lccr0;
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| 	u_int			reg_lccr1;
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| 	u_int			reg_lccr2;
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| 	u_int			reg_lccr3;
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| 
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| 	volatile u_char		state;
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| 	volatile u_char		task_state;
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| 	struct mutex		ctrlr_lock;
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| 	wait_queue_head_t	ctrlr_wait;
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| 	struct work_struct	task;
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| 
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| #ifdef CONFIG_CPU_FREQ
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| 	struct notifier_block	freq_transition;
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| #endif
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| 
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| 	const struct sa1100fb_mach_info *inf;
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| 	struct clk *clk;
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| 
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| 	u32 pseudo_palette[16];
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| };
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| 
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| #define TO_INF(ptr,member)	container_of(ptr,struct sa1100fb_info,member)
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| 
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| #define SA1100_PALETTE_MODE_VAL(bpp)    (((bpp) & 0x018) << 9)
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| 
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| /*
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|  * These are the actions for set_ctrlr_state
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|  */
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| #define C_DISABLE		(0)
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| #define C_ENABLE		(1)
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| #define C_DISABLE_CLKCHANGE	(2)
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| #define C_ENABLE_CLKCHANGE	(3)
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| #define C_REENABLE		(4)
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| #define C_DISABLE_PM		(5)
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| #define C_ENABLE_PM		(6)
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| #define C_STARTUP		(7)
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| 
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| #define SA1100_NAME	"SA1100"
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| 
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| /*
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|  * Minimum X and Y resolutions
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|  */
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| #define MIN_XRES	64
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| #define MIN_YRES	64
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| 
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