701a5dc05a
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
126 lines
4.7 KiB
C
126 lines
4.7 KiB
C
/*======================================================================
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Device driver for the PCMCIA control functionality of StrongARM
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SA-1100 microprocessors.
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The contents of this file are subject to the Mozilla Public
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License Version 1.1 (the "License"); you may not use this file
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except in compliance with the License. You may obtain a copy of
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the License at http://www.mozilla.org/MPL/
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Software distributed under the License is distributed on an "AS
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IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
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implied. See the License for the specific language governing
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rights and limitations under the License.
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The initial developer of the original code is John G. Dorsey
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<john+@cs.cmu.edu>. Portions created by John G. Dorsey are
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Copyright (C) 1999 John G. Dorsey. All Rights Reserved.
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Alternatively, the contents of this file may be used under the
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terms of the GNU Public License version 2 (the "GPL"), in which
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case the provisions of the GPL are applicable instead of the
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above. If you wish to allow the use of your version of this file
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only under the terms of the GPL and not to allow others to use
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your version of this file under the MPL, indicate your decision
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by deleting the provisions above and replace them with the notice
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and other provisions required by the GPL. If you do not delete
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the provisions above, a recipient may use your version of this
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file under either the MPL or the GPL.
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======================================================================*/
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#if !defined(_PCMCIA_SA1100_H)
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# define _PCMCIA_SA1100_H
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/* SA-1100 PCMCIA Memory and I/O timing
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* ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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* The SA-1110 Developer's Manual, section 10.2.5, says the following:
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*
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* "To calculate the recommended BS_xx value for each address space:
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* divide the command width time (the greater of twIOWR and twIORD,
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* or the greater of twWE and twOE) by processor cycle time; divide
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* by 2; divide again by 3 (number of BCLK's per command assertion);
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* round up to the next whole number; and subtract 1."
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*/
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/* MECR: Expansion Memory Configuration Register
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* (SA-1100 Developers Manual, p.10-13; SA-1110 Developers Manual, p.10-24)
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*
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* MECR layout is:
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*
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* FAST1 BSM1<4:0> BSA1<4:0> BSIO1<4:0> FAST0 BSM0<4:0> BSA0<4:0> BSIO0<4:0>
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*
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* (This layout is actually true only for the SA-1110; the FASTn bits are
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* reserved on the SA-1100.)
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*/
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#define MECR_SOCKET_0_SHIFT (0)
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#define MECR_SOCKET_1_SHIFT (16)
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#define MECR_BS_MASK (0x1f)
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#define MECR_FAST_MODE_MASK (0x01)
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#define MECR_BSIO_SHIFT (0)
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#define MECR_BSA_SHIFT (5)
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#define MECR_BSM_SHIFT (10)
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#define MECR_FAST_SHIFT (15)
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#define MECR_SET(mecr, sock, shift, mask, bs) \
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((mecr)=((mecr)&~(((mask)<<(shift))<<\
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((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))|\
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(((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))
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#define MECR_GET(mecr, sock, shift, mask) \
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((((mecr)>>(((sock)==0)?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT))>>\
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(shift))&(mask))
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#define MECR_BSIO_SET(mecr, sock, bs) \
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MECR_SET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK, (bs))
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#define MECR_BSIO_GET(mecr, sock) \
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MECR_GET((mecr), (sock), MECR_BSIO_SHIFT, MECR_BS_MASK)
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#define MECR_BSA_SET(mecr, sock, bs) \
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MECR_SET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK, (bs))
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#define MECR_BSA_GET(mecr, sock) \
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MECR_GET((mecr), (sock), MECR_BSA_SHIFT, MECR_BS_MASK)
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#define MECR_BSM_SET(mecr, sock, bs) \
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MECR_SET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK, (bs))
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#define MECR_BSM_GET(mecr, sock) \
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MECR_GET((mecr), (sock), MECR_BSM_SHIFT, MECR_BS_MASK)
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#define MECR_FAST_SET(mecr, sock, fast) \
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MECR_SET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK, (fast))
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#define MECR_FAST_GET(mecr, sock) \
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MECR_GET((mecr), (sock), MECR_FAST_SHIFT, MECR_FAST_MODE_MASK)
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/* This function implements the BS value calculation for setting the MECR
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* using integer arithmetic:
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*/
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static inline unsigned int sa1100_pcmcia_mecr_bs(unsigned int pcmcia_cycle_ns,
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unsigned int cpu_clock_khz){
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unsigned int t = ((pcmcia_cycle_ns * cpu_clock_khz) / 6) - 1000000;
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return (t / 1000000) + (((t % 1000000) == 0) ? 0 : 1);
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}
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/* This function returns the (approximate) command assertion period, in
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* nanoseconds, for a given CPU clock frequency and MECR BS value:
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*/
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static inline unsigned int sa1100_pcmcia_cmd_time(unsigned int cpu_clock_khz,
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unsigned int pcmcia_mecr_bs){
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return (((10000000 * 2) / cpu_clock_khz) * (3 * (pcmcia_mecr_bs + 1))) / 10;
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}
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int sa11xx_drv_pcmcia_add_one(struct soc_pcmcia_socket *skt);
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void sa11xx_drv_pcmcia_ops(struct pcmcia_low_level *ops);
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extern int sa11xx_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr);
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#endif /* !defined(_PCMCIA_SA1100_H) */
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