c693cc4676
All callers of these primitives will * discard anything we might've copied in case of error * ignore the csum value in case of error * always pass 0xffffffff as the initial sum, so the resulting csum value (in case of success, that is) will never be 0. That suggest the following calling conventions: * don't pass err_ptr - just return 0 on error. * don't bother with zeroing destination, etc. in case of error * don't pass the initial sum - just use 0xffffffff. This commit does the minimal conversion in the instances of csum_and_copy_...(); the changes of actual asm code behind them are done later in the series. Note that this asm code is often shared with csum_partial_copy_nocheck(); the difference is that csum_partial_copy_nocheck() passes 0 for initial sum while csum_and_copy_..._user() pass 0xffffffff. Fortunately, we are free to pass 0xffffffff in all cases and subsequent patches will use that freedom without any special comments. A part that could be split off: parisc and uml/i386 claimed to have csum_and_copy_to_user() instances of their own, but those were identical to the generic one, so we simply drop them. Not sure if it's worth a separate commit... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
178 lines
4.5 KiB
C
178 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _PARISC_CHECKSUM_H
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#define _PARISC_CHECKSUM_H
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#include <linux/in6.h>
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/*
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* computes the checksum of a memory block at buff, length len,
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* and adds in "sum" (32-bit)
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*
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* returns a 32-bit number suitable for feeding into itself
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* or csum_tcpudp_magic
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*
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* this function must be called with even lengths, except
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* for the last fragment, which may be odd
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*
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* it's best to have buff aligned on a 32-bit boundary
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*/
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extern __wsum csum_partial(const void *, int, __wsum);
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/*
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* Optimized for IP headers, which always checksum on 4 octet boundaries.
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*
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* Written by Randolph Chung <tausq@debian.org>, and then mucked with by
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* LaMont Jones <lamont@debian.org>
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*/
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static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
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{
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unsigned int sum;
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unsigned long t0, t1, t2;
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__asm__ __volatile__ (
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" ldws,ma 4(%1), %0\n"
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" addib,<= -4, %2, 2f\n"
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"\n"
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" ldws 4(%1), %4\n"
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" ldws 8(%1), %5\n"
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" add %0, %4, %0\n"
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" ldws,ma 12(%1), %3\n"
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" addc %0, %5, %0\n"
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" addc %0, %3, %0\n"
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"1: ldws,ma 4(%1), %3\n"
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" addib,< 0, %2, 1b\n"
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" addc %0, %3, %0\n"
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"\n"
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" extru %0, 31, 16, %4\n"
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" extru %0, 15, 16, %5\n"
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" addc %4, %5, %0\n"
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" extru %0, 15, 16, %5\n"
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" add %0, %5, %0\n"
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" subi -1, %0, %0\n"
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"2:\n"
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: "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (t0), "=r" (t1), "=r" (t2)
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: "1" (iph), "2" (ihl)
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: "memory");
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return (__force __sum16)sum;
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}
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/*
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* Fold a partial checksum
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*/
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static inline __sum16 csum_fold(__wsum csum)
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{
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u32 sum = (__force u32)csum;
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/* add the swapped two 16-bit halves of sum,
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a possible carry from adding the two 16-bit halves,
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will carry from the lower half into the upper half,
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giving us the correct sum in the upper half. */
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sum += (sum << 16) + (sum >> 16);
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return (__force __sum16)(~sum >> 16);
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}
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static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
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__u32 len, __u8 proto,
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__wsum sum)
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{
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__asm__(
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" add %1, %0, %0\n"
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" addc %2, %0, %0\n"
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" addc %3, %0, %0\n"
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" addc %%r0, %0, %0\n"
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: "=r" (sum)
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: "r" (daddr), "r"(saddr), "r"(proto+len), "0"(sum));
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return sum;
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}
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/*
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* computes the checksum of the TCP/UDP pseudo-header
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* returns a 16-bit checksum, already complemented
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*/
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static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
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__u32 len, __u8 proto,
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__wsum sum)
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{
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return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum));
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}
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/*
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* this routine is used for miscellaneous IP-like checksums, mainly
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* in icmp.c
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*/
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static inline __sum16 ip_compute_csum(const void *buf, int len)
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{
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return csum_fold (csum_partial(buf, len, 0));
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}
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#define _HAVE_ARCH_IPV6_CSUM
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static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
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const struct in6_addr *daddr,
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__u32 len, __u8 proto,
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__wsum sum)
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{
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unsigned long t0, t1, t2, t3;
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len += proto; /* add 16-bit proto + len */
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__asm__ __volatile__ (
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#if BITS_PER_LONG > 32
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/*
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** We can execute two loads and two adds per cycle on PA 8000.
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** But add insn's get serialized waiting for the carry bit.
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** Try to keep 4 registers with "live" values ahead of the ALU.
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*/
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" ldd,ma 8(%1), %4\n" /* get 1st saddr word */
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" ldd,ma 8(%2), %5\n" /* get 1st daddr word */
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" add %4, %0, %0\n"
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" ldd,ma 8(%1), %6\n" /* 2nd saddr */
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" ldd,ma 8(%2), %7\n" /* 2nd daddr */
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" add,dc %5, %0, %0\n"
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" add,dc %6, %0, %0\n"
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" add,dc %7, %0, %0\n"
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" add,dc %3, %0, %0\n" /* fold in proto+len | carry bit */
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" extrd,u %0, 31, 32, %4\n"/* copy upper half down */
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" depdi 0, 31, 32, %0\n"/* clear upper half */
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" add %4, %0, %0\n" /* fold into 32-bits */
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" addc 0, %0, %0\n" /* add carry */
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#else
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/*
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** For PA 1.x, the insn order doesn't matter as much.
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** Insn stream is serialized on the carry bit here too.
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** result from the previous operation (eg r0 + x)
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*/
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" ldw,ma 4(%1), %4\n" /* get 1st saddr word */
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" ldw,ma 4(%2), %5\n" /* get 1st daddr word */
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" add %4, %0, %0\n"
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" ldw,ma 4(%1), %6\n" /* 2nd saddr */
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" addc %5, %0, %0\n"
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" ldw,ma 4(%2), %7\n" /* 2nd daddr */
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" addc %6, %0, %0\n"
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" ldw,ma 4(%1), %4\n" /* 3rd saddr */
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" addc %7, %0, %0\n"
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" ldw,ma 4(%2), %5\n" /* 3rd daddr */
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" addc %4, %0, %0\n"
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" ldw,ma 4(%1), %6\n" /* 4th saddr */
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" addc %5, %0, %0\n"
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" ldw,ma 4(%2), %7\n" /* 4th daddr */
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" addc %6, %0, %0\n"
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" addc %7, %0, %0\n"
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" addc %3, %0, %0\n" /* fold in proto+len, catch carry */
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#endif
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: "=r" (sum), "=r" (saddr), "=r" (daddr), "=r" (len),
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"=r" (t0), "=r" (t1), "=r" (t2), "=r" (t3)
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: "0" (sum), "1" (saddr), "2" (daddr), "3" (len)
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: "memory");
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return csum_fold(sum);
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}
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#endif
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